AddressingMode
Align
Amount
ARM32Instruction
The internal representation for an ARM32 instruction used by our disassembler and lifter.
ARM32Parser
Parser for 32-bit ARM instructions. Parser will return a platform-agnostic instruction type (Instruction).
ARM32RegisterBay
ARM32RegisterSet (Module)
ARM32RegisterSet (Type)
ARM32TranslationContext
Translation context for 32-bit ARM instructions.
Basis
Condition
Const
Element
Iflag
InsInfo
Basic information for a single ARMv7 instruction obtained after parsing.
IRHelper
Label
Offset
Opcode
ARM32 opcodes. This type should be generated using scripts/genOpcode.fsx from the `ARM32SupportedOpcode.txt` file.
scripts/genOpcode.fsx
Operand
Operands
OptionOpr
Parser
PSRFlag
Qualifier
A8.2 Standard assembler syntax fields
Register (Module)
This module exposes several useful functions to handle ARMv8 registers.
Register (Type)
Shift
Sign
SIMDDataType
A2.6.3 Data types supported by the Advanced SIMD Extension
SIMDDataTypes
SIMDFPRegister
V{}{}{}{}{.} {,} ,
}{.} {,} ,
SIMDOperand
SRType