Represents a displacement value used for memory offset calculations.

Represents the EVEX prefix used in Intel instructions.

Represents an instruction for Intel x86 and x86-64 architectures.

Represents a parser for Intel (x86 or x86-64) instructions.

Represents the target of a jump instruction.

Represents the LowUIR builder for Intel.

Represents an offset value used for relative jump instructions.

Represents an Intel opcode. This type should be generated using scripts/genOpcode.fsx from the `IntelSupportedOpcodes.txt` file.

Represents four different types of intel operands: register, memory, direct address, and immediate.

Represents a set of operands in an intel instruction.

Represents operand size.

Represents an instruction prefixes.

Provides functions to handle Intel registers.

Represents registers for Intel x86 and x86-64.

Represents a factory for accessing various Intel register variables.

Represents the REX prefix used in x86-64 instructions.

Represents the scaling factor used in index addressing.

Represents a scaled index composed of a register and a scaling factor.

Represents a segment selector used in intel architecture.

Represents static rounding modes with Suppress All Exceptions (SAE) control, enabled via EVEX.b = 1 in register-register vector instructions.

Represents the VEX prefix used in Intel instructions.

Represents the original VEX prefix type (Vector Extension).

Represents the zeroing or merging behavior of the destination result (P[23] in EVEX encoding).