B2R2
Opcode Type
Represents an Intel opcode.
Record fields
| Record Field |
Description
|
ASCII Adjust After Addition.
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|
ASCII Adjust AX Before Division.
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ASCII Adjust AX After Multiply.
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ASCII Adjust AL After Subtraction.
|
|
Add With Carry.
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|
Unsigned Integer Addition of Two Operands With Carry Flag.
|
|
Add.
|
|
Add Packed Double Precision Floating-Point Values.
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|
Add Packed Single Precision Floating-Point Values.
|
|
Add Scalar Double Precision Floating-Point Values.
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Add Scalar Single Precision Floating-Point Values.
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|
Packed Double Precision Floating-Point Add/Subtract.
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Packed Single Precision Floating-Point Add/Subtract.
|
|
Unsigned Integer Addition of Two Operands With Overflow Flag.
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|
Perform One Round of an AES Decryption Flow.
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|
|
Perform Ten Rounds of AES Decryption Flow With Key Locker Using 128-Bit Key.
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|
Perform 14 Rounds of AES Decryption Flow With Key Locker Using 256-Bit Key.
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Perform Last Round of an AES Decryption Flow.
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Perform Ten Rounds of AES Decryption Flow With Key Locker on 8 Blocks Using 128-Bit Key.
|
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Perform 14 Rounds of AES Decryption Flow With Key Locker on 8 Blocks Using 256-Bit Key.
|
Perform One Round of an AES Encryption Flow.
|
|
|
Perform Ten Rounds of AES Encryption Flow With Key Locker Using 128-Bit Key.
|
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Perform 14 Rounds of AES Encryption Flow With Key Locker Using 256-Bit Key.
|
|
Perform Last Round of an AES Encryption Flow.
|
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Perform Ten Rounds of AES Encryption Flow With Key Locker on 8 Blocks Using 128-Bit Key.
|
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Perform 14 Rounds of AES Encryption Flow With Key Locker on 8 Blocks Using 256-Bit Key.
|
Perform the AES InvMixColumn Transformation.
|
|
|
AES Round Key Generation Assist.
|
Logical AND.
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Logical AND NOT.
|
|
Bitwise Logical AND NOT of Packed Double Precision Floating-Point Values.
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Bitwise Logical AND NOT of Packed Single Precision Floating-Point Values.
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Bitwise Logical AND of Packed Double Precision Floating-Point Values.
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Bitwise Logical AND of Packed Single Precision Floating-Point Values.
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Adjust RPL Field of Segment Selector.
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|
Bit Field Extract.
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|
Blend Packed Double Precision Floating-Point Values.
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Blend Packed Single Precision Floating-Point Values.
|
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Variable Blend Packed Double Precision Floating-Point Values.
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Variable Blend Packed Single Precision Floating-Point Values.
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Extract Lowest Set Isolated Bit.
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Get Mask Up to Lowest Set Bit.
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Reset Lowest Set Bit.
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Check Lower Bound.
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Check Upper Bound.
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|
Check Upper Bound.
|
|
Load Extended Bounds Using Address Translation.
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|
Make Bounds.
|
|
Move Bounds.
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Store Extended Bounds Using Address Translation.
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Check Array Index Against Bounds.
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|
Bit Scan Forward.
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Bit Scan Reverse.
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Byte Swap.
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|
Bit Test.
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Bit Test and Complement.
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Bit Test and Reset.
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Bit Test and Set.
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Zero High Bits Starting with Specified Bit Position.
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|
Call Procedure.
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Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword.
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|
Chinese national cryptographic algorithms.
|
Chinese national cryptographic algorithms.
|
|
Convert Word to Doubleword/Convert Doubleword to Quadword.
|
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Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword.
|
|
Clear AC Flag in EFLAGS Register.
|
|
Clear Carry Flag.
|
|
Clear Direction Flag.
|
|
Cache Line Demote.
|
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Flush Cache Line.
|
|
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Flush Cache Line Optimized.
|
Clear Interrupt Flag.
|
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Clear Busy Flag in a Supervisor Shadow Stack Token.
|
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Clear Task-Switched Flag in CR0.
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Clear User Interrupt Flag.
|
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Cache Line Write Back.
|
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Complement Carry Flag.
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Conditional Move.
|
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
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Conditional Move.
|
|
Conditional Move.
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Conditional Move.
|
|
Conditional Move.
|
|
Conditional Move.
|
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Conditional Move.
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|
Conditional Move.
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|
Conditional Move.
|
|
Compare Two Operands.
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|
Compare and Add if Condition is Met.
|
|
Compare and Add if Condition is Met.
|
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Compare and Add if Condition is Met.
|
|
Compare and Add if Condition is Met.
|
|
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Compare and Add if Condition is Met.
|
Compare and Add if Condition is Met.
|
|
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Compare and Add if Condition is Met.
|
Compare and Add if Condition is Met.
|
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Compare and Add if Condition is Met.
|
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Compare and Add if Condition is Met.
|
|
Compare and Add if Condition is Met.
|
|
Compare and Add if Condition is Met.
|
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Compare and Add if Condition is Met.
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Compare Packed Double Precision Floating-Point Values.
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Compare Packed Single Precision Floating-Point Values.
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Compare and Add if Condition is Met.
|
|
Compare String Operands.
|
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Compare String Operands.
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Compare String Operands. Compare Scalar Double Precision Floating-Point Value.
|
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Compare String Operands.
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Compare Scalar Single Precision Floating-Point Value.
|
|
Compare String Operands.
|
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Compare and Add if Condition is Met.
|
|
Compare and Exchange.
|
|
|
Compare and Exchange Bytes.
|
Compare and Exchange Bytes.
|
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Compare and Add if Condition is Met.
|
|
Compare Scalar Ordered Double Precision Floating-Point Values and Set EFLAGS.
|
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Compare Scalar Ordered Single Precision Floating-Point Values and Set EFLAGS.
|
|
CPU Identification.
|
|
Convert Word to Doubleword/Convert Doubleword to Quadword.
|
|
Accumulate CRC32 Value.
|
|
Convert Packed Doubleword Integers to Packed Double Precision Floating-Point Values.
|
|
Convert Packed Doubleword Integers to Packed Single Precision Floating-Point Values.
|
|
Convert Packed Double Precision Floating-Point Values to Packed Doubleword Integers.
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Convert Packed Double Precision Floating-Point Values to Packed Dword Integers.
|
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Convert Packed Double Precision Floating-Point Values to Packed Single Precision Floating-Point Values.
|
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Convert Packed Dword Integers to Packed Double Precision Floating-Point Values.
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Convert Packed Dword Integers to Packed Single Precision Floating-Point Values.
|
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Convert Packed Single Precision Floating-Point Values to Packed Signed Doubleword Integer Values.
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Convert Packed Single Precision Floating-Point Values to Packed Double Precision Floating-Point Values.
|
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Convert Packed Single Precision Floating-Point Values to Packed Dword Integers.
|
|
Convert Scalar Double Precision Floating-Point Value to Signed Integer.
|
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Convert Scalar Double Precision Floating-Point Value to Scalar Single Precision Floating-Point Value.
|
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Convert Signed Integer to Scalar Double Precision Floating-Point Value.
|
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Convert Signed Integer to Scalar Single Precision Floating-Point Value.
|
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Convert Scalar Single Precision Floating-Point Value to Scalar Double Precision Floating-Point Value.
|
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Convert Scalar Single Precision Floating-Point Value to Signed Integer.
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Convert with Truncation Packed Double Precision Floating-Point Values to Packed Doubleword Integers.
|
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Convert With Truncation Packed Double Precision Floating-Point Values to Packed Dword Integers.
|
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Convert With Truncation Packed Single Precision Floating-Point Values to Packed Signed Doubleword Integer Values.
|
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Convert With Truncation Packed Single Precision Floating-Point Values to Packed Dword Integers.
|
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Convert With Truncation Scalar Double Precision Floating-Point Value to Signed Integer.
|
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Convert With Truncation Scalar Single Precision Floating-Point Value to Signed Integer.
|
|
Convert Word to Doubleword/Convert Doubleword to Quadword.
|
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Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword.
|
|
Decimal Adjust AL After Addition.
|
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Decimal Adjust AL After Subtraction.
|
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Decrement by 1.
|
|
Unsigned Divide.
|
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Divide Packed Double Precision Floating-Point Values.
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Divide Packed Single Precision Floating-Point Values.
|
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Divide Scalar Double Precision Floating-Point Value.
|
|
Divide Scalar Single Precision Floating-Point Values.
|
|
Dot Product of Packed Double Precision Floating-Point Values.
|
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Dot Product of Packed Single Precision Floating-Point Values.
|
|
Empty MMX Technology State.
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|
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Encode 128-Bit Key With Key Locker.
|
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Encode 256-Bit Key With Key Locker.
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Terminate an Indirect Branch in 32-bit and Compatibility Mode.
|
|
Terminate an Indirect Branch in 64-bit Mode.
|
|
Enqueue Command.
|
|
Enqueue Command Supervisor.
|
|
Make Stack Frame for Procedure Parameters.
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Extract Packed Floating-Point Values.
|
|
Extract Field from Register.
|
|
Compute 2x-1.
|
|
Absolute Value.
|
|
Add.
|
|
Add.
|
|
Load Binary Coded Decimal.
|
|
Store BCD Integer and Pop.
|
|
Change Sign.
|
|
Clear Exceptions.
|
|
Floating-Point Conditional Move.
|
|
Floating-Point Conditional Move.
|
|
Floating-Point Conditional Move.
|
|
Floating-Point Conditional Move.
|
|
Floating-Point Conditional Move.
|
|
Floating-Point Conditional Move.
|
|
Floating-Point Conditional Move.
|
|
Floating-Point Conditional Move.
|
|
Compare Floating-Point Values.
|
|
Compare Floating-Point Values and Set EFLAGS.
|
|
Compare Floating-Point Values and Set EFLAGS.
|
|
Compare Floating-Point Values.
|
|
Compare Floating-Point Values.
|
|
Cosine.
|
|
Decrement Stack-Top Pointer.
|
|
Divide.
|
|
Divide.
|
|
Reverse Divide.
|
|
Reverse Divide.
|
|
Free Floating-Point Register.
|
|
Performs FFREE ST(i) and pop stack.
|
|
Add.
|
|
Compare Integer.
|
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Compare Integer.
|
|
Divide.
|
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Reverse Divide.
|
|
Load Integer.
|
|
Multiply.
|
|
Increment Stack-Top Pointer.
|
|
Initialize Floating-Point Unit.
|
|
Store Integer.
|
|
Store Integer.
|
|
Store Integer With Truncation.
|
|
Subtract.
|
|
Reverse Subtract.
|
|
Load Floating-Point Value.
|
|
Load Constant.
|
|
Load x87 FPU Control Word.
|
|
Load x87 FPU Environment.
|
|
Load Constant.
|
|
Load Constant.
|
|
Load Constant.
|
|
Load Constant.
|
|
Load Constant.
|
|
Load Constant.
|
|
Multiply.
|
|
Multiply.
|
|
Clear Exceptions.
|
|
Initialize Floating-Point Unit.
|
|
No Operation.
|
|
Store x87 FPU State.
|
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Store x87 FPU Control Word.
|
|
Store x87 FPU Environment.
|
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Store x87 FPU Status Word.
|
|
Partial Arctangent.
|
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Partial Remainder.
|
|
Partial Remainder.
|
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Partial Tangent.
|
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Round to Integer.
|
|
Restore x87 FPU State.
|
|
Store x87 FPU State.
|
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Scale.
|
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Sine.
|
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Sine and Cosine.
|
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Square Root.
|
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Store Floating-Point Value.
|
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Store x87 FPU Control Word.
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Store x87 FPU Environment.
|
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Store Floating-Point Value.
|
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Store x87 FPU Status Word.
|
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Subtract.
|
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Subtract.
|
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Reverse Subtract.
|
|
Reverse Subtract.
|
|
TEST.
|
|
Unordered Compare Floating-Point Values.
|
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Compare Floating-Point Values and Set EFLAGS.
|
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Compare Floating-Point Values and Set EFLAGS.
|
|
Unordered Compare Floating-Point Values.
|
|
Unordered Compare Floating-Point Values.
|
|
Wait.
|
|
Examine Floating-Point.
|
|
Exchange Register Contents.
|
|
Restore x87 FPU, MMX, XMM, and MXCSR State.
|
|
Restore x87 FPU, MMX, XMM, and MXCSR State.
|
|
Save x87 FPU, MMX Technology, and SSE State.
|
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Save x87 FPU, MMX Technology, and SSE State.
|
|
Extract Exponent and Significand.
|
|
Compute y * log2x.
|
|
Compute y * log2(x +1).
|
|
GETSEC[CAPABILITIES]: Report the SMX capabilities. The capabilities index is input in EBX with the result returned in EAX. GETSEC[ENTERACCS]: Enter authenticated code execution mode. EBX holds the authenticated code module physical base address. ECX holds the authenticated code module size (bytes). GETSEC[EXITAC]: Exit authenticated code execution mode. RBX holds the Near Absolute Indirect jump target and EDX hold the exit parameter flags. GETSEC[SENTER]: Launch a measured environment. EBX holds the SINIT authenticated code module physical base address. ECX holds the SINIT authenticated code module size (bytes). EDX controls the level of functionality supported by the measured environment launch. GETSEC[SEXIT]: Exit measured environment. GETSEC[PARAMETERS]: Report the SMX parameters. The parameters index is input in EBX with the result returned in EAX, EBX, and ECX. GETSEC[SMCTRL]: Perform specified SMX mode control as selected with the input EBX. GETSEC[WAKEUP]: Wake up the responding logical processors from the SENTER sleep state.
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|
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Galois Field Affine Transformation Inverse.
|
|
Galois Field Affine Transformation.
|
Galois Field Multiply Bytes.
|
|
Packed Double Precision Floating-Point Horizontal Add.
|
|
Packed Single Precision Floating-Point Horizontal Add.
|
|
Halt.
|
|
History Reset.
|
|
Packed Double Precision Floating-Point Horizontal Subtract.
|
|
Packed Single Precision Floating-Point Horizontal Subtract.
|
|
Signed Divide.
|
|
Signed Multiply.
|
|
Input From Port.
|
|
Increment by 1.
|
|
Increment Shadow Stack Pointer.
|
|
Increment Shadow Stack Pointer.
|
|
Input from Port to String.
|
|
Input from Port to String.
|
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Input from Port to String.
|
|
Insert Scalar Single Precision Floating-Point Value.
|
|
Inserts Field from a source Register to a destination Register.
|
|
Input from Port to String.
|
|
Call to Interrupt Procedure.
|
|
Call to Interrupt Procedure.
|
|
Call to Interrupt Procedure.
|
|
Call to Interrupt Procedure.
|
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Invalidate Internal Caches.
|
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Invalidate TLB Entries.
|
|
Invalidate Process-Context Identifier.
|
|
Interrupt Return.
|
|
Interrupt Return.
|
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Interrupt Return.
|
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Interrupt return (16-bit operand size).
|
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Invalid Opcode.
|
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Jump if Condition Is Met.
|
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|
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Jump if Condition Is Met.
|
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Jump if Condition Is Met.
|
|
|
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Jump if Condition Is Met.
|
|
|
|
Jump if Condition Is Met.
|
|
Jump if Condition Is Met.
|
|
|
|
Jump if Condition Is Met.
|
|
Jump if Condition Is Met.
|
|
Jump.
|
|
|
|
|
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Jump if Condition Is Met.
|
|
|
|
|
|
|
|
|
|
|
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Jump if Condition Is Met.
|
|
|
|
Jump if Condition Is Met.
|
|
Jump if Condition Is Met.
|
|
Jump if Condition Is Met.
|
|
Jump if Condition Is Met.
|
|
Jump if Condition Is Met.
|
|
Jump if Condition Is Met.
|
|
|
|
|
|
Jump if Condition Is Met.
|
|
Jump if Condition Is Met.
|
|
Jump if Condition Is Met.
|
|
ADD Two Masks.
|
|
ADD Two Masks.
|
|
ADD Two Masks.
|
|
ADD Two Masks.
|
|
Bitwise Logical AND Masks.
|
|
Bitwise Logical AND Masks.
|
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Bitwise Logical AND NOT Masks.
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Bitwise Logical AND NOT Masks.
|
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Bitwise Logical AND NOT Masks.
|
|
Bitwise Logical AND NOT Masks.
|
|
Bitwise Logical AND Masks.
|
|
Bitwise Logical AND Masks.
|
|
Move From and to Mask Registers.
|
|
Move From and to Mask Registers.
|
|
Move From and to Mask Registers.
|
|
Move From and to Mask Registers.
|
|
NOT Mask Register.
|
|
NOT Mask Register.
|
|
NOT Mask Register.
|
|
NOT Mask Register.
|
|
Bitwise Logical OR Masks.
|
|
Bitwise Logical OR Masks.
|
|
Bitwise Logical OR Masks.
|
|
OR Masks and Set Flags.
|
|
OR Masks and Set Flags.
|
|
OR Masks and Set Flags.
|
|
OR Masks and Set Flags.
|
|
Bitwise Logical OR Masks.
|
|
Shift Left Mask Registers.
|
|
Shift Left Mask Registers.
|
|
Shift Left Mask Registers.
|
|
Shift Left Mask Registers.
|
|
Shift Right Mask Registers.
|
|
Shift Right Mask Registers.
|
|
Shift Right Mask Registers.
|
|
Shift Right Mask Registers.
|
|
Packed Bit Test Masks and Set Flags.
|
|
Packed Bit Test Masks and Set Flags.
|
|
Packed Bit Test Masks and Set Flags.
|
|
Packed Bit Test Masks and Set Flags.
|
|
Unpack for Mask Registers.
|
|
Unpack for Mask Registers.
|
|
Unpack for Mask Registers.
|
|
Bitwise Logical XNOR Masks.
|
|
Bitwise Logical XNOR Masks.
|
|
Bitwise Logical XNOR Masks.
|
|
Bitwise Logical XNOR Masks.
|
|
Bitwise Logical XOR Masks.
|
|
Bitwise Logical XOR Masks.
|
|
Bitwise Logical XOR Masks.
|
|
Bitwise Logical XOR Masks.
|
|
Load Status Flags Into AH Register.
|
|
Load Access Rights.
|
|
Load Unaligned Integer 128 Bits.
|
|
Load MXCSR Register.
|
|
Load Far Pointer.
|
|
Load Tile Configuration.
|
|
Load Effective Address.
|
|
High Level Procedure Exit.
|
|
Load Far Pointer.
|
|
Load Fence.
|
|
Load Far Pointer.
|
|
Load Global/Interrupt Descriptor Table Register.
|
|
Load Far Pointer.
|
|
Load Global/Interrupt Descriptor Table Register.
|
|
Load Local Descriptor Table Register.
|
|
Load Machine Status Word.
|
|
Load Internal Wrapping Key With Key Locker.
|
|
Assert LOCK# Signal Prefix.
|
|
Load String.
|
|
Load String.
|
|
Load String.
|
|
Load String.
|
|
Load String.
|
|
Loop According to ECX Counter.
|
|
Loop According to ECX Counter.
|
|
Loop According to ECX Counter.
|
|
Load Segment Limit.
|
|
Load Far Pointer.
|
|
Load Task Register.
|
|
Count the Number of Leading Zero Bits.
|
|
|
Store Selected Bytes of Double Quadword.
|
Store Selected Bytes of Quadword.
|
|
Maximum of Packed Double Precision Floating-Point Values.
|
|
Maximum of Packed Single Precision Floating-Point Values.
|
|
Return Maximum Scalar Double Precision Floating-Point Value.
|
|
Return Maximum Scalar Single Precision Floating-Point Value.
|
|
Memory Fence.
|
|
Minimum of Packed Double Precision Floating-Point Values.
|
|
Minimum of Packed Single Precision Floating-Point Values.
|
|
Return Minimum Scalar Double Precision Floating-Point Value.
|
|
Return Minimum Scalar Single Precision Floating-Point Value.
|
|
Set Up Monitor Address.
|
|
Montgomery multiplier (PMM).
|
|
Montgomery multiplier (PMM).
|
|
Move.
|
|
Move Aligned Packed Double Precision Floating-Point Values.
|
|
Move Aligned Packed Single Precision Floating-Point Values.
|
|
Move Data After Swapping Bytes.
|
|
Move Doubleword/Move Quadword.
|
|
Replicate Double Precision Floating-Point Values.
|
|
Move 64 Bytes as Direct Store.
|
|
Move Doubleword as Direct Store.
|
|
Move Quadword from XMM to MMX Technology Register.
|
|
Move Aligned Packed Integer Values.
|
|
Move Unaligned Packed Integer Values.
|
|
Move Packed Single Precision Floating-Point Values High to Low.
|
|
Move High Packed Double Precision Floating-Point Value.
|
|
Move High Packed Single Precision Floating-Point Values.
|
|
Move Packed Single Precision Floating-Point Values Low to High.
|
|
Move Low Packed Double Precision Floating-Point Value.
|
|
Move Low Packed Single Precision Floating-Point Values.
|
|
Extract Packed Double Precision Floating-Point Sign Mask.
|
|
Extract Packed Single Precision Floating-Point Sign Mask.
|
|
Store Packed Integers Using Non-Temporal Hint.
|
|
Load Double Quadword Non-Temporal Aligned Hint.
|
|
Store Doubleword Using Non-Temporal Hint.
|
|
Store Packed Double Precision Floating-Point Values Using Non-Temporal Hint.
|
|
Store Packed Single Precision Floating-Point Values Using Non-Temporal Hint.
|
|
Store of Quadword Using Non-Temporal Hint.
|
|
Move Doubleword/Move Quadword. Move Quadword.
|
|
Move Quadword from MMX Technology to XMM Register.
|
|
Move Data From String to String.
|
|
Move Data From String to String.
|
|
Move Data From String to String. Move or Merge Scalar Double Precision Floating-Point Value.
|
|
Replicate Single Precision Floating-Point Values.
|
|
Replicate Single Precision Floating-Point Values.
|
|
Move Data From String to String.
|
|
Move or Merge Scalar Single Precision Floating-Point Value.
|
|
Move Data From String to String.
|
|
Move With Sign-Extension.
|
|
Move With Sign-Extension.
|
|
Move Unaligned Packed Double Precision Floating-Point Values.
|
|
Move Unaligned Packed Single Precision Floating-Point Values.
|
|
Move With Zero-Extend.
|
|
Compute Multiple Packed Sums of Absolute Difference.
|
|
Unsigned Multiply.
|
|
Multiply Packed Double Precision Floating-Point Values.
|
|
Multiply Packed Single Precision Floating-Point Values.
|
|
Multiply Scalar Double Precision Floating-Point Value.
|
|
Multiply Scalar Single Precision Floating-Point Values.
|
|
Unsigned Multiply Without Affecting Flags.
|
|
Monitor Wait.
|
|
Two's Complement Negation.
|
|
No Operation.
|
|
One's Complement Negation.
|
|
Logical Inclusive OR.
|
|
Bitwise Logical OR of Packed Double Precision Floating-Point Values.
|
|
Bitwise Logical OR of Packed Single Precision Floating-Point Values.
|
|
Output to Port.
|
|
Output String to Port.
|
|
Output String to Port.
|
|
Output String to Port.
|
|
Output String to Port.
|
|
Packed Absolute Value.
|
|
Packed Absolute Value.
|
|
Packed Absolute Value.
|
|
Pack With Signed Saturation.
|
|
Pack With Signed Saturation.
|
|
Pack With Unsigned Saturation.
|
|
Pack With Unsigned Saturation.
|
|
Add Packed Integers.
|
|
Add Packed Integers.
|
|
Add Packed Integers.
|
|
Add Packed Signed Integers with Signed Saturation.
|
|
Add Packed Signed Integers with Signed Saturation.
|
|
Add Packed Unsigned Integers With Unsigned Saturation.
|
|
Add Packed Unsigned Integers With Unsigned Saturation.
|
|
Add Packed Integers.
|
|
Packed Align Right.
|
|
Logical AND.
|
|
Logical AND NOT.
|
|
Spin Loop Hint.
|
|
Average Packed Integers.
|
|
Average Packed Integers.
|
|
Variable Blend Packed Bytes.
|
|
Blend Packed Words.
|
|
Carry-Less Multiplication Quadword.
|
|
Compare Packed Data for Equal.
|
|
Compare Packed Data for Equal.
|
|
Compare Packed Qword Data for Equal.
|
|
Compare Packed Data for Equal.
|
|
Packed Compare Explicit Length Strings, Return Index.
|
|
Packed Compare Explicit Length Strings, Return Mask.
|
|
Compare Packed Signed Integers for Greater Than.
|
|
Compare Packed Signed Integers for Greater Than.
|
|
Compare Packed Data for Greater Than.
|
|
Compare Packed Signed Integers for Greater Than.
|
|
Packed Compare Implicit Length Strings, Return Index.
|
|
Packed Compare Implicit Length Strings, Return Mask.
|
|
Platform Configuration.
|
|
Parallel Bits Deposit.
|
|
Parallel Bits Extract.
|
|
Extract Byte/Dword/Qword.
|
|
Extract Byte/Dword/Qword.
|
|
Extract Byte/Dword/Qword.
|
|
Extract Word.
|
|
Packed Horizontal Add.
|
|
Packed Horizontal Add and Saturate.
|
|
Packed Horizontal Add.
|
|
|
Packed Horizontal Word Minimum.
|
Packed Horizontal Subtract.
|
|
Packed Horizontal Subtract and Saturate.
|
|
Packed Horizontal Subtract.
|
|
Insert Byte/Dword/Qword.
|
|
Insert Byte/Dword/Qword.
|
|
Insert Byte/Dword/Qword.
|
|
Insert Word.
|
|
Multiply and Add Packed Signed and Unsigned Bytes.
|
|
Multiply and Add Packed Integers.
|
|
Maximum of Packed Signed Integers.
|
|
Maximum of Packed Signed Integers.
|
|
Maximum of Packed Signed Integers.
|
|
Maximum of Packed Unsigned Integers.
|
|
Maximum of Packed Unsigned Integers.
|
|
Maximum of Packed Unsigned Integers.
|
|
Minimum of Packed Signed Integers.
|
|
Minimum of Packed Signed Integers.
|
|
Minimum of Packed Signed Integers.
|
|
Minimum of Packed Unsigned Integers.
|
|
Minimum of Packed Unsigned Integers.
|
|
Minimum of Packed Unsigned Integers.
|
|
Move Byte Mask.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Zero Extend.
|
|
Packed Move With Zero Extend.
|
|
Packed Move With Zero Extend.
|
|
Packed Move With Zero Extend.
|
|
Packed Move With Zero Extend.
|
|
Packed Move With Zero Extend.
|
|
Multiply Packed Doubleword Integers.
|
|
Packed Multiply High With Round and Scale.
|
|
Multiply Packed Unsigned Integers and Store High Result.
|
|
Multiply Packed Signed Integers and Store High Result.
|
|
Multiply Packed Integers and Store Low Result.
|
|
Multiply Packed Signed Integers and Store Low Result.
|
|
Multiply Packed Unsigned Doubleword Integers.
|
|
Pop a Value From the Stack.
|
|
Pop All General-Purpose Registers.
|
|
Pop All General-Purpose Registers.
|
|
Return the Count of Number of Bits Set to 1.
|
|
Pop Stack Into EFLAGS Register.
|
|
Pop Stack Into EFLAGS Register.
|
|
Pop Stack Into EFLAGS Register.
|
|
Bitwise Logical OR.
|
|
|
Prefetch Data Into Caches.
|
|
Prefetch Data Into Caches.
|
|
Prefetch Data Into Caches.
|
|
Prefetch Data Into Caches.
|
|
Prefetch Data Into Caches.
|
|
Prefetch Data Into Caches.
|
Prefetch Data Into Caches in Anticipation of a Write.
|
|
|
Prefetch Vector Data Into Caches With Intent to Write and T1 Hint.
|
Compute Sum of Absolute Differences.
|
|
Packed Shuffle Bytes.
|
|
Shuffle Packed Doublewords.
|
|
Shuffle Packed High Words.
|
|
Shuffle Packed Low Words.
|
|
Shuffle Packed Words.
|
|
Packed SIGN.
|
|
Packed SIGN.
|
|
Packed SIGN.
|
|
Shift Packed Data Left Logical.
|
|
Shift Double Quadword Left Logical.
|
|
Shift Packed Data Left Logical.
|
|
Shift Packed Data Left Logical.
|
|
Shift Packed Data Right Arithmetic.
|
|
Shift Packed Data Right Arithmetic.
|
|
Shift Packed Data Right Logical.
|
|
Shift Double Quadword Right Logical.
|
|
Shift Packed Data Right Logical.
|
|
Shift Packed Data Right Logical.
|
|
Subtract Packed Integers.
|
|
Subtract Packed Integers.
|
|
Subtract Packed Quadword Integers.
|
|
Subtract Packed Signed Integers With Signed Saturation.
|
|
Subtract Packed Signed Integers With Signed Saturation.
|
|
Subtract Packed Unsigned Integers With Unsigned Saturation.
|
|
Subtract Packed Unsigned Integers With Unsigned Saturation.
|
|
Subtract Packed Integers.
|
|
Logical Compare.
|
|
Write Data to a Processor Trace Packet.
|
|
Unpack High Data.
|
|
Unpack High Data.
|
|
|
Unpack High Data.
|
Unpack High Data.
|
|
Unpack Low Data.
|
|
Unpack Low Data.
|
|
|
Unpack Low Data.
|
Unpack Low Data.
|
|
Push Word, Doubleword, or Quadword Onto the Stack.
|
|
Push All General-Purpose Registers.
|
|
Push All General-Purpose Registers.
|
|
Push EFLAGS Register Onto the Stack.
|
|
Push EFLAGS Register Onto the Stack.
|
|
Push EFLAGS Register Onto the Stack.
|
|
Logical Exclusive OR.
|
|
Rotate.
|
|
Compute Reciprocals of Packed Single Precision Floating-Point Values.
|
|
Compute Reciprocal of Scalar Single Precision Floating-Point Values.
|
|
Rotate.
|
|
Read FS/GS Segment Base.
|
|
Read FS/GS Segment Base.
|
|
Read From Model Specific Register.
|
|
Read List of Model Specific Registers.
|
|
Read Processor ID.
|
|
Read Protection Key Rights for User Pages.
|
|
Read Performance-Monitoring Counters.
|
|
Read Random Number.
|
|
Read Random SEED.
|
|
Read Shadow Stack Pointer.
|
|
Read Shadow Stack Pointer.
|
|
Read Time-Stamp Counter.
|
|
Read Time-Stamp Counter and Processor ID.
|
|
Return From Procedure.
|
|
Rotate.
|
|
Rotate.
|
|
Rotate Right Logical Without Affecting Flags.
|
|
Round Packed Double Precision Floating-Point Values.
|
|
Round Packed Single Precision Floating-Point Values.
|
|
Round Scalar Double Precision Floating-Point Values.
|
|
Round Scalar Single Precision Floating-Point Values.
|
|
Resume From System Management Mode.
|
|
Compute Reciprocals of Square Roots of Packed Single Precision Floating-Point Values.
|
|
Compute Reciprocal of Square Root of Scalar Single Precision Floating-Point Value.
|
|
Restore Saved Shadow Stack Pointer.
|
|
Store AH Into Flags.
|
|
Shift.
|
|
Shift.
|
|
Shift Without Affecting Flags.
|
|
|
Save Previous Shadow Stack Pointer.
|
Integer Subtraction With Borrow.
|
|
Scan String.
|
|
Scan String.
|
|
Scan String.
|
|
Scan String.
|
|
Scan String.
|
|
Send User Interprocessor Interrupt.
|
|
Serialize Instruction Execution.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Set Byte on Condition.
|
|
Mark Shadow Stack Busy.
|
|
Set Byte on Condition.
|
|
Store Fence.
|
|
Store Global Descriptor Table Register.
|
|
Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords.
|
|
Perform a Final Calculation for the Next Four SHA1 Message Dwords.
|
|
Calculate SHA1 State Variable E After Four Rounds.
|
|
Perform Four Rounds of SHA1 Operation.
|
|
|
Perform an Intermediate Calculation for the Next Four SHA256 Message Dwords.
|
|
Perform a Final Calculation for the Next Four SHA256 Message Dwords.
|
|
Perform Two Rounds of SHA256 Operation.
|
Shift.
|
|
Double Precision Shift Left.
|
|
Shift Without Affecting Flags.
|
|
Shift.
|
|
Double Precision Shift Right.
|
|
Shift Without Affecting Flags.
|
|
Packed Interleave Shuffle of Pairs of Double Precision Floating-Point Values.
|
|
Packed Interleave Shuffle of Quadruplets of Single Precision Floating-Point Values.
|
|
Store Interrupt Descriptor Table Register.
|
|
Store Local Descriptor Table Register.
|
|
Chinese national cryptographic algorithms.
|
|
Store Machine Status Word.
|
|
Square Root of Double Precision Floating-Point Values.
|
|
Square Root of Single Precision Floating-Point Values.
|
|
Compute Square Root of Scalar Double Precision Floating-Point Value.
|
|
Compute Square Root of Scalar Single Precision Value.
|
|
Set AC Flag in EFLAGS Register.
|
|
Set Carry Flag.
|
|
Set Direction Flag.
|
|
Set Interrupt Flag.
|
|
Store MXCSR Register State.
|
|
Store String.
|
|
Store String.
|
|
Store String.
|
|
Store String.
|
|
Store String.
|
|
Store Task Register.
|
|
Store Tile Configuration.
|
|
Set User Interrupt Flag.
|
|
Subtract.
|
|
Subtract Packed Double Precision Floating-Point Values.
|
|
Subtract Packed Single Precision Floating-Point Values.
|
|
Subtract Scalar Double Precision Floating-Point Value.
|
|
Subtract Scalar Single Precision Floating-Point Value.
|
|
Swap GS Base Register.
|
|
Fast System Call.
|
|
Fast System Call.
|
|
Fast Return from Fast System Call.
|
|
Return From Fast System Call.
|
|
Dot Product of BF16 Tiles Accumulated into Packed Single Precision Tile.
|
|
Dot Product of Signed/Unsigned Bytes with Dword Accumulation.
|
|
Dot Product of Signed/Unsigned Bytes with Dword Accumulation.
|
|
Dot Product of Signed/Unsigned Bytes with Dword Accumulation.
|
|
Dot Product of Signed/Unsigned Bytes with Dword Accumulation.
|
|
Dot Product of FP16 Tiles Accumulated into Packed Single Precision Tile.
|
|
Logical Compare.
|
|
Determine User Interrupt Flag.
|
|
Load Tile.
|
|
|
Load Tile.
|
|
Release Tile.
|
|
Store Tile.
|
Zero Tile.
|
|
Timed PAUSE.
|
|
Count the Number of Trailing Zero Bits.
|
|
Unordered Compare Scalar Double Precision Floating-Point Values and Set EFLAGS.
|
|
Unordered Compare Scalar Single Precision Floating-Point Values and Set EFLAGS.
|
|
Undefined Instruction.
|
|
Undefined Instruction.
|
|
Undefined Instruction.
|
|
Undefined Instruction.
|
|
User-Interrupt Return.
|
|
User Level Set Up Monitor Address.
|
|
User Level Monitor Wait.
|
|
Unpack and Interleave High Packed Double Precision Floating-Point Values.
|
|
Unpack and Interleave High Packed Single Precision Floating-Point Values.
|
|
Unpack and Interleave Low Packed Double Precision Floating-Point Values.
|
|
Unpack and Interleave Low Packed Single Precision Floating-Point Values.
|
|
Packed Single Precision Floating-Point Fused Multiply-Add (4-Iterations).
|
|
Scalar Single Precision Floating-Point Fused Multiply-Add (4-Iterations).
|
|
|
Packed Single Precision Floating-Point Fused Multiply-Add (4-Iterations).
|
|
Scalar Single Precision Floating-Point Fused Multiply-Add (4-Iterations).
|
Add Packed Double Precision Floating-Point Values.
|
|
Add Packed FP16 Values.
|
|
Add Packed Single Precision Floating-Point Values.
|
|
Add Scalar Double Precision Floating-Point Values.
|
|
Add Scalar FP16 Values.
|
|
Add Scalar Single Precision Floating-Point Values.
|
|
Packed Double Precision Floating-Point Add/Subtract.
|
|
Packed Single Precision Floating-Point Add/Subtract.
|
|
Perform One Round of an AES Decryption Flow.
|
|
|
Perform Last Round of an AES Decryption Flow.
|
Perform One Round of an AES Encryption Flow.
|
|
|
Perform Last Round of an AES Encryption Flow.
|
Perform the AES InvMixColumn Transformation.
|
|
|
AES Round Key Generation Assist.
|
Align Doubleword/Quadword Vectors.
|
|
Align Doubleword/Quadword Vectors.
|
|
Bitwise Logical AND NOT of Packed Double Precision Floating-Point Values.
|
|
Bitwise Logical AND NOT of Packed Single Precision Floating-Point Values.
|
|
Bitwise Logical AND of Packed Double Precision Floating-Point Values.
|
|
Bitwise Logical AND of Packed Single Precision Floating-Point Values.
|
|
|
Load BF16 Element and Convert to FP32 Element With Broadcast.
|
|
Load FP16 Element and Convert to FP32 Element with Broadcast.
|
Blend Float64/Float32 Vectors Using an OpMask Control.
|
|
Blend Float64/Float32 Vectors Using an OpMask Control.
|
|
Blend Packed Double Precision Floating-Point Values.
|
|
Blend Packed Single Precision Floating-Point Values.
|
|
Variable Blend Packed Double Precision Floating-Point Values.
|
|
Variable Blend Packed Single Precision Floating-Point Values.
|
|
|
Load with Broadcast Floating-Point Data.
|
|
Load with Broadcast Floating-Point Data.
|
|
Load with Broadcast Floating-Point Data.
|
|
Load with Broadcast Floating-Point Data.
|
|
Load with Broadcast Floating-Point Data.
|
|
Load with Broadcast Floating-Point Data.
|
|
Load Integer and Broadcast.
|
|
Load Integer and Broadcast.
|
|
Load Integer and Broadcast.
|
|
Load Integer and Broadcast.
|
|
Load Integer and Broadcast.
|
|
Load Integer and Broadcast.
|
|
Load with Broadcast Floating-Point Data.
|
|
Load with Broadcast Floating-Point Data.
|
Compare Packed Double Precision Floating-Point Values.
|
|
Compare Packed FP16 Values.
|
|
Compare Packed Single Precision Floating-Point Values.
|
|
Compare Scalar Double Precision Floating-Point Value.
|
|
Compare Scalar FP16 Values.
|
|
Compare Scalar Single Precision Floating-Point Value.
|
|
Compare Scalar Ordered Double Precision Floating-Point Values and Set EFLAGS.
|
|
Compare Scalar Ordered FP16 Values and Set EFLAGS.
|
|
Compare Scalar Ordered Single Precision Floating-Point Values and Set EFLAGS.
|
|
|
Store Sparse Packed Double Precision Floating-Point Values Into Dense Memory.
|
|
Store Sparse Packed Single Precision Floating-Point Values Into Dense Memory.
|
Convert Packed Doubleword Integers to Packed Double Precision Floating-Point Values.
|
|
Convert Packed Signed Doubleword Integers to Packed FP16 Values.
|
|
Convert Packed Doubleword Integers to Packed Single Precision Floating-Point Values.
|
|
|
Convert Two Packed Single Data to One Packed BF16 Data.
|
|
Convert Even Elements of Packed BF16 Values to FP32 Values.
|
|
Convert Even Elements of Packed FP16 Values to FP32 Values.
|
|
Convert Odd Elements of Packed BF16 Values to FP32 Values.
|
|
Convert Odd Elements of Packed FP16 Values to FP32 Values.
|
|
Convert Packed Single Data to Packed BF16 Data.
|
Convert Packed Double Precision Floating-Point Values to Packed Doubleword Integers.
|
|
Convert Packed Double Precision FP Values to Packed FP16 Values.
|
|
Convert Packed Double Precision Floating-Point Values to Packed Single Precision Floating-Point Values.
|
|
Convert Packed Double Precision Floating-Point Values to Packed Quadword Integers.
|
|
|
Convert Packed Double Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
|
|
Convert Packed Double Precision Floating-Point Values to Packed Unsigned Quadword Integers.
|
Convert Packed FP16 Values to Signed Doubleword Integers.
|
|
Convert Packed FP16 Values to FP64 Values.
|
|
Convert Packed FP16 Values to Single Precision Floating-Point Values.
|
|
|
Convert Packed FP16 Values to Single Precision Floating-Point Values.
|
Convert Packed FP16 Values to Signed Quadword Integer Values.
|
|
|
Convert Packed FP16 Values to Unsigned Doubleword Integers.
|
|
Convert Packed FP16 Values to Unsigned Quadword Integers.
|
Convert Packed FP16 Values to Unsigned Word Integers.
|
|
Convert Packed FP16 Values to Signed Word Integers.
|
|
Convert Packed Single Precision Floating-Point Values to Packed Signed Doubleword Integer Values.
|
|
Convert Packed Single Precision Floating-Point Values to Packed Double Precision Floating-Point Values.
|
|
Convert Single Precision FP Value to 16-bit FP Value.
|
|
|
Convert Packed Single Precision Floating-Point Values to Packed FP16 Values.
|
Convert Packed Single Precision Floating-Point Values to Packed Signed Quadword Integer Values.
|
|
|
Convert Packed Single Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values.
|
|
Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values.
|
Convert Packed Quadword Integers to Packed Double Precision Floating-Point Values.
|
|
Convert Packed Signed Quadword Integers to Packed FP16 Values.
|
|
Convert Packed Quadword Integers to Packed Single Precision Floating-Point Values.
|
|
Convert Low FP64 Value to an FP16 Value.
|
|
Convert Scalar Double Precision Floating-Point Value to Signed Integer.
|
|
Convert Scalar Double Precision Floating-Point Value to Scalar Single Precision Floating-Point Value.
|
|
|
Convert Scalar Double Precision Floating-Point Value to Unsigned Integer.
|
Convert Low FP16 Value to an FP64 Value.
|
|
Convert Low FP16 Value to Signed Integer.
|
|
Convert Low FP16 Value to FP32 Value.
|
|
|
Convert Low FP16 Value to Unsigned Integer.
|
Convert Signed Integer to Scalar Double Precision Floating-Point Value.
|
|
Convert a Signed Doubleword/Quadword Integer to an FP16 Value.
|
|
Convert Signed Integer to Scalar Single Precision Floating-Point Value.
|
|
Convert Scalar Single Precision Floating-Point Value to Scalar Double Precision Floating-Point Value.
|
|
Convert Low FP32 Value to an FP16 Value.
|
|
Convert Scalar Single Precision Floating-Point Value to Signed Integer.
|
|
|
Convert Scalar Single Precision Floating-Point Value to Unsigned Doubleword Integer.
|
|
Convert with Truncation Packed Double Precision Floating-Point Values to Packed Doubleword Integers.
|
|
Convert With Truncation Packed Double Precision Floating-Point Values to Packed Quadword Integers.
|
|
Convert With Truncation Packed Double Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
|
|
Convert With Truncation Packed Double Precision Floating-Point Values to Packed Unsigned Quadword Integers.
|
|
Convert with Truncation Packed FP16 Values to Signed Doubleword Integers.
|
|
Convert with Truncation Packed FP16 Values to Signed Quadword Integers.
|
|
Convert with Truncation Packed FP16 Values to Unsigned Doubleword Integers.
|
|
Convert with Truncation Packed FP16 Values to Unsigned Quadword Integers.
|
|
Convert Packed FP16 Values to Unsigned Word Integers.
|
Convert Packed FP16 Values to Signed Word Integers.
|
|
|
Convert With Truncation Packed Single Precision Floating-Point Values to Packed Signed Doubleword Integer Values.
|
|
Convert With Truncation Packed Single Precision Floating-Point Values to Packed Signed Quadword Integer Values.
|
|
Convert With Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values.
|
|
Convert With Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values.
|
|
Convert With Truncation Scalar Double Precision Floating-Point Value to Signed Integer.
|
|
Convert With Truncation Scalar Double Precision Floating-Point Value to Unsigned Integer.
|
|
Convert with Truncation Low FP16 Value to a Signed Integer.
|
|
Convert with Truncation Low FP16 Value to an Unsigned Integer.
|
|
Convert With Truncation Scalar Single Precision Floating-Point Value to Signed Integer.
|
|
Convert With Truncation Scalar Single Precision Floating-Point Value to Unsigned Integer.
|
|
Convert Packed Unsigned Doubleword Integers to Packed Double Precision Floating-Point Values.
|
|
Convert Packed Unsigned Doubleword Integers to Packed FP16 Values.
|
|
Convert Packed Unsigned Doubleword Integers to Packed Single Precision Floating-Point Values.
|
|
Convert Packed Unsigned Quadword Integers to Packed Double Precision Floating-Point Values.
|
|
Convert Packed Unsigned Quadword Integers to Packed FP16 Values.
|
|
Convert Packed Unsigned Quadword Integers to Packed Single Precision Floating-Point Values.
|
|
Convert Unsigned Integer to Scalar Double Precision Floating-Point Value.
|
|
Convert Unsigned Doubleword Integer to an FP16 Value.
|
|
Convert Unsigned Integer to Scalar Single Precision Floating-Point Value.
|
Convert Packed Unsigned Word Integers to FP16 Values.
|
|
Convert Packed Signed Word Integers to FP16 Values.
|
|
Double Block Packed Sum-Absolute-Differences (SAD) on Unsigned Bytes.
|
|
Divide Packed Double Precision Floating-Point Values.
|
|
Divide Packed FP16 Values.
|
|
Divide Packed Single Precision Floating-Point Values.
|
|
Divide Scalar Double Precision Floating-Point Value.
|
|
Divide Scalar FP16 Values.
|
|
Divide Scalar Single Precision Floating-Point Values.
|
|
Dot Product of BF16 Pairs Accumulated Into Packed Single Precision.
|
|
Dot Product of Packed Double Precision Floating-Point Values.
|
|
Dot Product of Packed Single Precision Floating-Point Values.
|
|
Verify a Segment for Reading or Writing.
|
|
Verify a Segment for Reading or Writing.
|
|
Approximation to the Exponential 2^x of Packed Double Precision Floating-Point Values With Less Than 2^-23 Relative Error.
|
|
Approximation to the Exponential 2^x of Packed Single Precision Floating-Point Values With Less Than 2^-23 Relative Error.
|
|
Load Sparse Packed Double Precision Floating-Point Values From Dense Memory.
|
|
Load Sparse Packed Single Precision Floating-Point Values From Dense Memory.
|
|
|
Extract Packed Floating-Point Values.
|
|
Extract Packed Floating-Point Values.
|
|
Extract Packed Floating-Point Values.
|
|
Extract Packed Floating-Point Values.
|
|
Extract Packed Floating-Point Values.
|
|
Extract Packed Integer Values.
|
|
Extract Packed Integer Values.
|
|
Extract Packed Integer Values.
|
|
Extract Packed Integer Values.
|
|
Extract Packed Integer Values.
|
|
Extract Packed Floating-Point Values.
|
|
Complex Multiply and Accumulate FP16 Values.
|
|
Complex Multiply and Accumulate Scalar FP16 Values.
|
Complex Multiply FP16 Values.
|
|
Complex Multiply Scalar FP16 Values.
|
|
|
Fix Up Special Packed Float64 Values.
|
|
Fix Up Special Packed Float32 Values.
|
|
Fix Up Special Scalar Float64 Value.
|
|
Fix Up Special Scalar Float32 Value.
|
|
Fused Multiply-Add of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Packed FP16 Values.
|
|
Fused Multiply-Add of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Add of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Scalar FP16 Values.
|
|
Fused Multiply-Add of Scalar Single Precision Floating-Point Values.
|
|
Fused Multiply-Add of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Packed FP16 Values.
|
|
Fused Multiply-Add of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Add of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Scalar FP16 Values.
|
|
Fused Multiply-Add of Scalar Single Precision Floating-Point Values.
|
|
Fused Multiply-Add of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Packed FP16 Values.
|
|
Fused Multiply-Add of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Add of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Scalar FP16 Values.
|
|
Fused Multiply-Add of Scalar Single Precision Floating-Point Values.
|
Complex Multiply and Accumulate FP16 Values.
|
|
Complex Multiply and Accumulate Scalar FP16 Values.
|
|
Multiply and Add Packed Double-Precision Floating-Point(Only AMD).
|
|
Multiply and Add Packed Single-Precision Floating-Point(Only AMD).
|
|
Multiply and Add Scalar Double-Precision Floating-Point(Only AMD).
|
|
Multiply and Add Scalar Single-Precision Floating-Point(Only AMD).
|
|
|
Fused Multiply-Alternating Add/Subtract of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Add/Subtract of Packed FP16 Values.
|
|
Fused Multiply-Alternating Add/Subtract of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Add/Subtract of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Add/Subtract of Packed FP16 Values.
|
|
Fused Multiply-Alternating Add/Subtract of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Add/Subtract of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Add/Subtract of Packed FP16 Values.
|
|
Fused Multiply-Alternating Add/Subtract of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Packed FP16 Values.
|
|
Fused Multiply-Subtract of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Scalar FP16 Values.
|
|
Fused Multiply-Subtract of Scalar Single Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Packed FP16 Values.
|
|
Fused Multiply-Subtract of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Scalar FP16 Values.
|
|
Fused Multiply-Subtract of Scalar Single Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Packed FP16 Values.
|
|
Fused Multiply-Subtract of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Scalar FP16 Values.
|
|
Fused Multiply-Subtract of Scalar Single Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Subtract/Add of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Subtract/Add of Packed FP16 Values.
|
|
Fused Multiply-Alternating Subtract/Add of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Subtract/Add of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Subtract/Add of Packed FP16 Values.
|
|
Fused Multiply-Alternating Subtract/Add of Packed Single Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Subtract/Add of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Alternating Subtract/Add of Packed FP16 Values.
|
|
Fused Multiply-Alternating Subtract/Add of Packed Single Precision Floating-Point Values.
|
Complex Multiply FP16 Values.
|
|
Complex Multiply Scalar FP16 Values.
|
|
|
Fused Negative Multiply-Add of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Packed FP16 Values.
|
|
Fused Negative Multiply-Add of Packed Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Add of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Scalar FP16 Values.
|
|
Fused Negative Multiply-Add of Scalar Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Add of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Packed FP16 Values.
|
|
Fused Negative Multiply-Add of Packed Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Add of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Scalar FP16 Values.
|
|
Fused Negative Multiply-Add of Scalar Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Add of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Packed FP16 Values.
|
|
Fused Negative Multiply-Add of Packed Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Add of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Add of Scalar FP16 Values.
|
|
Fused Negative Multiply-Add of Scalar Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Subtract of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Packed FP16 Values.
|
|
Fused Negative Multiply-Subtract of Packed Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Subtract of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Scalar FP16 Values.
|
|
Fused Negative Multiply-Subtract of Scalar Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Subtract of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Packed FP16 Values.
|
|
Fused Negative Multiply-Subtract of Packed Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Subtract of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Scalar FP16 Values.
|
|
Fused Negative Multiply-Subtract of Scalar Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Subtract of Packed Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Packed FP16 Values.
|
|
Fused Negative Multiply-Subtract of Packed Single Precision Floating-Point Values.
|
|
Fused Negative Multiply-Subtract of Scalar Double Precision Floating-Point Values.
|
|
Fused Multiply-Subtract of Scalar FP16 Values.
|
|
Fused Negative Multiply-Subtract of Scalar Single Precision Floating-Point Values.
|
|
Tests Types of Packed Float64 Values.
|
|
Test Types of Packed FP16 Values.
|
|
Tests Types of Packed Float32 Values.
|
|
Tests Type of a Scalar Float64 Value.
|
|
Test Types of Scalar FP16 Values.
|
|
Tests Type of a Scalar Float32 Value.
|
|
Gather Packed Double Precision Floating-Point Values Using Signed Dword/Qword Indices. Gather Packed Single, Packed Double with Signed Dword Indices.
|
|
Gather Packed Single, Packed Double with Signed Dword Indices. Gather Packed Single Precision Floating-Point Values Using Signed Dword/Qword Indices.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T0 Hint.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T0 Hint.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T0 Hint.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T0 Hint.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint.
|
|
Gather Packed Double Precision Floating-Point Values Using Signed Dword/Qword Indices. Gather Packed Single, Packed Double with Signed Qword Indices.
|
|
Gather Packed Single Precision Floating-Point Values Using Signed Dword/Qword Indices. Gather Packed Single, Packed Double with Signed Qword Indices.
|
Convert Exponents of Packed Double Precision Floating-Point Values to Double Precision Floating-Point Values.
|
|
Convert Exponents of Packed FP16 Values to FP16 Values.
|
|
Convert Exponents of Packed Single Precision Floating-Point Values to Single Precision Floating-Point Values.
|
|
Convert Exponents of Scalar Double Precision Floating-Point Value to Double Precision Floating-Point Value.
|
|
Convert Exponents of Scalar FP16 Values to FP16 Values.
|
|
Convert Exponents of Scalar Single Precision Floating-Point Value to Single Precision Floating-Point Value.
|
|
|
Extract Float64 Vector of Normalized Mantissas From Float64 Vector.
|
|
Extract FP16 Vector of Normalized Mantissas from FP16 Vector.
|
|
Extract Float32 Vector of Normalized Mantissas From Float32 Vector.
|
|
Extract Float64 of Normalized Mantissa From Float64 Scalar.
|
|
Extract FP16 of Normalized Mantissa from FP16 Scalar.
|
|
Extract Float32 Vector of Normalized Mantissa From Float32 Scalar.
|
|
Galois Field Affine Transformation Inverse.
|
|
Galois Field Affine Transformation.
|
|
Galois Field Multiply Bytes.
|
Packed Double Precision Floating-Point Horizontal Add.
|
|
Packed Single Precision Floating-Point Horizontal Add.
|
|
Packed Double Precision Floating-Point Horizontal Subtract.
|
|
Packed Single Precision Floating-Point Horizontal Subtract.
|
|
|
Insert Packed Floating-Point Values.
|
|
Insert Packed Floating-Point Values.
|
|
Insert Packed Floating-Point Values.
|
|
Insert Packed Floating-Point Values.
|
|
Insert Packed Floating-Point Values.
|
|
Insert Packed Integer Values.
|
|
Insert Packed Integer Values.
|
|
Insert Packed Integer Values.
|
|
Insert Packed Integer Values.
|
|
Insert Packed Integer Values.
|
Insert Scalar Single Precision Floating-Point Value.
|
|
Load Unaligned Integer 128 Bits.
|
|
Load MXCSR Register.
|
|
|
Store Selected Bytes of Double Quadword.
|
|
Conditional SIMD Packed Loads and Stores.
|
|
Conditional SIMD Packed Loads and Stores.
|
Maximum of Packed Double Precision Floating-Point Values.
|
|
Return Maximum of Packed FP16 Values.
|
|
Maximum of Packed Single Precision Floating-Point Values.
|
|
Return Maximum Scalar Double Precision Floating-Point Value.
|
|
Return Maximum of Scalar FP16 Values.
|
|
Return Maximum Scalar Single Precision Floating-Point Value.
|
|
Call to VM Monitor.
|
|
Clear Virtual-Machine Control Structure.
|
|
Invoke VM function.
|
|
Minimum of Packed Double Precision Floating-Point Values.
|
|
Return Minimum of Packed FP16 Values.
|
|
Minimum of Packed Single Precision Floating-Point Values.
|
|
Return Minimum Scalar Double Precision Floating-Point Value.
|
|
Return Minimum Scalar FP16 Value.
|
|
Return Minimum Scalar Single Precision Floating-Point Value.
|
|
Launch Virtual Machine.
|
|
Move Aligned Packed Double Precision Floating-Point Values.
|
|
Move Aligned Packed Single Precision Floating-Point Values.
|
|
Move Doubleword/Move Quadword.
|
|
Replicate Double Precision Floating-Point Values.
|
|
Move Aligned Packed Integer Values.
|
|
Move Aligned Packed Integer Values.
|
|
Move Aligned Packed Integer Values.
|
|
Move Unaligned Packed Integer Values.
|
|
Move Unaligned Packed Integer Values.
|
|
Move Unaligned Packed Integer Values.
|
|
Move Unaligned Packed Integer Values.
|
|
Move Unaligned Packed Integer Values.
|
|
Move Packed Single Precision Floating-Point Values High to Low.
|
|
Move High Packed Double Precision Floating-Point Value.
|
|
Move High Packed Single Precision Floating-Point Values.
|
|
Move Packed Single Precision Floating-Point Values Low to High.
|
|
Move Low Packed Double Precision Floating-Point Value.
|
|
Move Low Packed Single Precision Floating-Point Values.
|
|
Extract Packed Double Precision Floating-Point Sign Mask.
|
|
Extract Packed Single Precision Floating-Point Sign Mask.
|
|
Store Packed Integers Using Non-Temporal Hint.
|
|
Load Double Quadword Non-Temporal Aligned Hint.
|
|
Store Packed Double Precision Floating-Point Values Using Non-Temporal Hint.
|
|
Store Packed Single Precision Floating-Point Values Using Non-Temporal Hint.
|
|
Move Doubleword/Move Quadword. Move Quadword.
|
|
Move or Merge Scalar Double Precision Floating-Point Value.
|
|
Move Scalar FP16 Value.
|
|
Replicate Single Precision Floating-Point Values.
|
|
Replicate Single Precision Floating-Point Values.
|
|
Move or Merge Scalar Single Precision Floating-Point Value.
|
|
Move Unaligned Packed Double Precision Floating-Point Values.
|
|
Move Unaligned Packed Single Precision Floating-Point Values.
|
|
Move Word.
|
|
Compute Multiple Packed Sums of Absolute Difference.
|
|
Load Pointer to Virtual-Machine Control Structure.
|
|
Store Pointer to Virtual-Machine Control Structure.
|
|
Reads a component from the VMCS and stores it into a destination operand.
|
|
Resume Virtual Machine.
|
|
Multiply Packed Double Precision Floating-Point Values.
|
|
Multiply Packed FP16 Values.
|
|
Multiply Packed Single Precision Floating-Point Values.
|
|
Multiply Scalar Double Precision Floating-Point Value.
|
|
Multiply Scalar FP16 Values.
|
|
Multiply Scalar Single Precision Floating-Point Values.
|
|
Leave VMX Operation.
|
|
Enter VMX Operation.
|
|
Bitwise Logical OR of Packed Double Precision Floating-Point Values.
|
|
Bitwise Logical OR of Packed Single Precision Floating-Point Values.
|
|
|
Compute Intersection Between DWORDS/QUADWORDS to a Pair of Mask Registers.
|
|
Compute Intersection Between DWORDS/QUADWORDS to a Pair of Mask Registers.
|
Dot Product of Signed Words With Dword Accumulation (4-Iterations).
|
|
|
Dot Product of Signed Words With Dword Accumulation and Saturation (4-Iterations).
|
Packed Absolute Value.
|
|
Packed Absolute Value.
|
|
Packed Absolute Value.
|
|
Packed Absolute Value.
|
|
Pack With Signed Saturation.
|
|
Pack With Signed Saturation.
|
|
Pack With Unsigned Saturation.
|
|
Pack With Unsigned Saturation.
|
|
Add Packed Integers.
|
|
Add Packed Integers.
|
|
Add Packed Integers.
|
|
Add Packed Signed Integers with Signed Saturation.
|
|
Add Packed Signed Integers with Signed Saturation.
|
|
Add Packed Unsigned Integers With Unsigned Saturation.
|
|
Add Packed Unsigned Integers With Unsigned Saturation.
|
|
Add Packed Integers.
|
|
Packed Align Right.
|
|
Logical AND.
|
|
Logical AND.
|
|
Logical AND NOT.
|
|
Logical AND NOT.
|
|
Logical AND NOT.
|
|
Logical AND.
|
|
Average Packed Integers.
|
|
Average Packed Integers.
|
|
Blend Packed Dwords.
|
|
Blend Byte/Word Vectors Using an Opmask Control.
|
|
Blend Int32/Int64 Vectors Using an OpMask Control.
|
|
Blend Int32/Int64 Vectors Using an OpMask Control.
|
|
Blend Byte/Word Vectors Using an Opmask Control.
|
|
Variable Blend Packed Bytes.
|
|
Blend Packed Words.
|
|
|
Load Integer and Broadcast. Load With Broadcast Integer Data From General Purpose Register.
|
|
Load Integer and Broadcast. Load With Broadcast Integer Data From General Purpose Register.
|
|
Broadcast Mask to Vector Register.
|
|
Broadcast Mask to Vector Register.
|
|
Load Integer and Broadcast. Load With Broadcast Integer Data From General Purpose Register.
|
|
Load Integer and Broadcast. Load With Broadcast Integer Data From General Purpose Register.
|
|
Carry-Less Multiplication Quadword.
|
Compare Packed Byte Values Into Mask.
|
|
Compare Packed Integer Values Into Mask.
|
|
Compare Packed Data for Equal.
|
|
Compare Packed Data for Equal.
|
|
Compare Packed Qword Data for Equal.
|
|
Compare Packed Data for Equal.
|
|
|
Packed Compare Explicit Length Strings, Return Index.
|
|
Packed Compare Explicit Length Strings, Return Mask.
|
Compare Packed Signed Integers for Greater Than.
|
|
Compare Packed Signed Integers for Greater Than.
|
|
Compare Packed Data for Greater Than.
|
|
Compare Packed Signed Integers for Greater Than.
|
|
|
Packed Compare Implicit Length Strings, Return Index.
|
|
Packed Compare Implicit Length Strings, Return Mask.
|
Compare Packed Integer Values Into Mask.
|
|
Compare Packed Byte Values Into Mask.
|
|
Compare Packed Integer Values Into Mask.
|
|
Compare Packed Integer Values Into Mask.
|
|
Compare Packed Word Values Into Mask.
|
|
Compare Packed Word Values Into Mask.
|
|
|
Store Sparse Packed Byte/Word Integer Values Into Dense Memory/Register.
|
|
Store Sparse Packed Doubleword Integer Values Into Dense Memory/Register.
|
|
Store Sparse Packed Quadword Integer Values Into Dense Memory/Register.
|
|
Store Sparse Packed Byte/Word Integer Values Into Dense Memory/Register.
|
|
Detect Conflicts Within a Vector of Packed Dword/Qword Values Into Dense Memory/ Register.
|
|
Detect Conflicts Within a Vector of Packed Dword/Qword Values Into Dense Memory/ Register.
|
Multiply and Add Unsigned and Signed Bytes With and Without Saturation.
|
|
Multiply and Add Unsigned and Signed Bytes With and Without Saturation.
|
|
Multiply and Add Unsigned and Signed Bytes With and Without Saturation.
|
|
Multiply and Add Unsigned and Signed Bytes With and Without Saturation.
|
|
Multiply and Add Unsigned and Signed Bytes.
|
|
Multiply and Add Unsigned and Signed Bytes With Saturation.
|
|
Multiply and Add Unsigned and Signed Bytes With and Without Saturation.
|
|
Multiply and Add Unsigned and Signed Bytes With and Without Saturation.
|
|
Multiply and Add Signed Word Integers.
|
|
Multiply and Add Signed Word Integers With Saturation.
|
|
Multiply and Add Unsigned and Signed Words With and Without Saturation.
|
|
Multiply and Add Unsigned and Signed Words With and Without Saturation.
|
|
Multiply and Add Unsigned and Signed Words With and Without Saturation.
|
|
Multiply and Add Unsigned and Signed Words With and Without Saturation.
|
|
Multiply and Add Unsigned and Signed Words With and Without Saturation.
|
|
Multiply and Add Unsigned and Signed Words With and Without Saturation.
|
|
|
Permute Floating-Point Values.
|
|
Permute Integer Values.
|
Permute Packed Bytes Elements.
|
|
Permute Packed Doubleword/Word Elements.
|
|
Full Permute of Bytes From Two Tables Overwriting the Index.
|
|
Full Permute From Two Tables Overwriting the Index.
|
|
Full Permute From Two Tables Overwriting the Index.
|
|
Full Permute From Two Tables Overwriting the Index.
|
|
Full Permute From Two Tables Overwriting the Index.
|
|
Full Permute From Two Tables Overwriting the Index.
|
|
Permute In-Lane of Pairs of Double Precision Floating-Point Values.
|
|
Permute In-Lane of Quadruples of Single Precision Floating-Point Values.
|
|
Permute Double Precision Floating-Point Elements.
|
|
Permute Single Precision Floating-Point Elements.
|
|
Qwords Element Permutation.
|
|
Full Permute of Bytes From Two Tables Overwriting a Table.
|
|
Full Permute From Two Tables Overwriting One Table.
|
|
Full Permute From Two Tables Overwriting One Table.
|
|
Full Permute From Two Tables Overwriting One Table.
|
|
Full Permute From Two Tables Overwriting One Table.
|
|
Full Permute From Two Tables Overwriting One Table.
|
|
Permute Packed Doubleword/Word Elements.
|
|
Expand Byte/Word Values.
|
|
Load Sparse Packed Doubleword Integer Values From Dense Memory/Register.
|
|
Load Sparse Packed Quadword Integer Values From Dense Memory/Register.
|
|
Expand Byte/Word Values.
|
|
Extract Byte/Dword/Qword.
|
|
Extract Byte/Dword/Qword.
|
|
Extract Byte/Dword/Qword.
|
|
Extract Word.
|
|
|
Gather Packed Dword, Packed Qword With Signed Dword Indices. Gather Packed Dword Values Using Signed Dword/Qword Indices.
|
|
Gather Packed Dword, Packed Qword With Signed Dword Indices. Gather Packed Qword Values Using Signed Dword/Qword Indices.
|
|
Gather Packed Dword Values Using Signed Dword/Qword Indices. Gather Packed Dword, Packed Qword with Signed Qword Indices.
|
|
Gather Packed Qword Values Using Signed Dword/Qword Indices. Gather Packed Dword, Packed Qword with Signed Qword Indices.
|
Packed Horizontal Add.
|
|
Packed Horizontal Add and Saturate.
|
|
Packed Horizontal Add.
|
|
|
Packed Horizontal Word Minimum.
|
Packed Horizontal Subtract.
|
|
Packed Horizontal Subtract and Saturate.
|
|
Packed Horizontal Subtract.
|
|
Insert Byte/Dword/Qword.
|
|
Insert Byte/Dword/Qword.
|
|
Insert Byte/Dword/Qword.
|
|
Insert Word.
|
|
Count the Number of Leading Zero Bits for Packed Dword, Packed Qword Values.
|
|
Count the Number of Leading Zero Bits for Packed Dword, Packed Qword Values.
|
|
|
Packed Multiply of Unsigned 52-Bit Unsigned Integers and Add High 52-Bit Products to 64-Bit Accumulators.
|
|
Packed Multiply of Unsigned 52-Bit Integers and Add the Low 52-Bit Products to Qword Accumulators.
|
|
Multiply and Add Packed Signed and Unsigned Bytes.
|
Multiply and Add Packed Integers.
|
|
|
Conditional SIMD Integer Packed Loads and Stores.
|
|
Conditional SIMD Integer Packed Loads and Stores.
|
Maximum of Packed Signed Integers.
|
|
Maximum of Packed Signed Integers.
|
|
Maximum of Packed Signed Integers.
|
|
Maximum of Packed Signed Integers.
|
|
Maximum of Packed Unsigned Integers.
|
|
Maximum of Packed Unsigned Integers.
|
|
Maximum of Packed Unsigned Integers.
|
|
Maximum of Packed Unsigned Integers.
|
|
Minimum of Packed Signed Integers.
|
|
Minimum of Packed Signed Integers.
|
|
Minimum of Packed Signed Integers.
|
|
Minimum of Packed Signed Integers.
|
|
Minimum of Packed Unsigned Integers.
|
|
Minimum of Packed Unsigned Integers.
|
|
Minimum of Packed Unsigned Integers.
|
|
Minimum of Packed Unsigned Integers.
|
|
Convert a Vector Register to a Mask.
|
|
Convert a Vector Register to a Mask.
|
|
Down Convert DWord to Byte.
|
|
Down Convert DWord to Word.
|
|
Convert a Mask Register to a Vector Register.
|
|
Convert a Mask Register to a Vector Register.
|
|
Convert a Mask Register to a Vector Register.
|
|
Convert a Mask Register to a Vector Register.
|
|
Move Byte Mask.
|
|
Convert a Vector Register to a Mask.
|
|
Down Convert QWord to Byte.
|
|
Down Convert QWord to DWord.
|
|
Down Convert QWord to Word.
|
|
Down Convert DWord to Byte.
|
|
Down Convert DWord to Word.
|
|
Down Convert QWord to Byte.
|
|
Down Convert QWord to DWord.
|
|
Down Convert QWord to Word.
|
|
Down Convert Word to Byte.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Sign Extend.
|
|
Packed Move With Sign Extend.
|
|
Down Convert DWord to Byte.
|
|
Down Convert DWord to Word.
|
|
Down Convert QWord to Byte.
|
|
Down Convert QWord to DWord.
|
|
Down Convert QWord to Word.
|
|
Down Convert Word to Byte.
|
|
Convert a Vector Register to a Mask.
|
|
Down Convert Word to Byte.
|
|
Packed Move With Zero Extend.
|
|
Packed Move With Zero Extend.
|
|
Packed Move With Zero Extend.
|
|
Packed Move With Zero Extend.
|
|
Packed Move With Zero Extend.
|
|
Packed Move With Zero Extend.
|
|
Multiply Packed Doubleword Integers.
|
|
Packed Multiply High With Round and Scale.
|
|
Multiply Packed Unsigned Integers and Store High Result.
|
|
Multiply Packed Signed Integers and Store High Result.
|
|
Multiply Packed Integers and Store Low Result.
|
|
Multiply Packed Integers and Store Low Result.
|
|
Multiply Packed Signed Integers and Store Low Result.
|
|
|
Select Packed Unaligned Bytes From Quadword Sources.
|
Multiply Packed Unsigned Doubleword Integers.
|
|
Return the Count of Number of Bits Set to 1 in BYTE/WORD/DWORD/QWORD.
|
|
Return the Count of Number of Bits Set to 1 in BYTE/WORD/DWORD/QWORD.
|
|
Return the Count of Number of Bits Set to 1 in BYTE/WORD/DWORD/QWORD.
|
|
Return the Count of Number of Bits Set to 1 in BYTE/WORD/DWORD/QWORD.
|
|
Bitwise Logical OR.
|
|
Bitwise Logical OR.
|
|
Bitwise Logical OR.
|
|
Bit Rotate Left.
|
|
Bit Rotate Left.
|
|
Bit Rotate Left.
|
|
Bit Rotate Left.
|
|
Bit Rotate Right.
|
|
Bit Rotate Right.
|
|
Bit Rotate Right.
|
|
Bit Rotate Right.
|
|
Compute Sum of Absolute Differences.
|
|
|
Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices.
|
|
Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices.
|
|
Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices.
|
|
Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices.
|
Concatenate and Shift Packed Data Left Logical.
|
|
Concatenate and Shift Packed Data Left Logical.
|
|
Concatenate and Variable Shift Packed Data Left Logical.
|
|
Concatenate and Variable Shift Packed Data Left Logical.
|
|
Concatenate and Variable Shift Packed Data Left Logical.
|
|
Concatenate and Shift Packed Data Left Logical.
|
|
Concatenate and Shift Packed Data Right Logical.
|
|
Concatenate and Shift Packed Data Right Logical.
|
|
Concatenate and Variable Shift Packed Data Right Logical.
|
|
Concatenate and Variable Shift Packed Data Right Logical.
|
|
Concatenate and Variable Shift Packed Data Right Logical.
|
|
Concatenate and Shift Packed Data Right Logical.
|
|
Packed Shuffle Bytes.
|
|
|
Shuffle Bits From Quadword Elements Using Byte Indexes Into Mask.
|
Shuffle Packed Doublewords.
|
|
Shuffle Packed High Words.
|
|
Shuffle Packed Low Words.
|
|
Packed SIGN.
|
|
Packed SIGN.
|
|
Packed SIGN.
|
|
Shift Packed Data Left Logical.
|
|
Shift Double Quadword Left Logical.
|
|
Shift Packed Data Left Logical.
|
|
Variable Bit Shift Left Logical.
|
|
Variable Bit Shift Left Logical.
|
|
Variable Bit Shift Left Logical.
|
|
Shift Packed Data Left Logical.
|
|
Shift Packed Data Right Arithmetic.
|
|
Shift Packed Data Right Arithmetic.
|
|
Variable Bit Shift Right Arithmetic.
|
|
Variable Bit Shift Right Arithmetic.
|
|
Variable Bit Shift Right Arithmetic.
|
|
Shift Packed Data Right Arithmetic.
|
|
Shift Packed Data Right Logical.
|
|
Shift Double Quadword Right Logical.
|
|
Shift Packed Data Right Logical.
|
|
Variable Bit Shift Right Logical.
|
|
Variable Bit Shift Right Logical.
|
|
Variable Bit Shift Right Logical.
|
|
Shift Packed Data Right Logical.
|
|
Subtract Packed Integers.
|
|
Subtract Packed Integers.
|
|
Subtract Packed Quadword Integers.
|
|
Subtract Packed Signed Integers With Signed Saturation.
|
|
Subtract Packed Signed Integers With Signed Saturation.
|
|
Subtract Packed Unsigned Integers With Unsigned Saturation.
|
|
Subtract Packed Unsigned Integers With Unsigned Saturation.
|
|
Subtract Packed Integers.
|
|
|
Bitwise Ternary Logic.
|
|
Bitwise Ternary Logic.
|
Logical Compare.
|
|
Logical AND and Set Mask.
|
|
Logical AND and Set Mask.
|
|
Logical AND and Set Mask.
|
|
Logical AND and Set Mask.
|
|
Logical NAND and Set.
|
|
Logical NAND and Set.
|
|
Logical NAND and Set.
|
|
Logical NAND and Set.
|
|
|
Unpack High Data.
|
|
Unpack High Data.
|
|
Unpack High Data.
|
|
Unpack High Data.
|
|
Unpack Low Data.
|
|
Unpack Low Data.
|
|
Unpack Low Data.
|
|
Unpack Low Data.
|
Logical Exclusive OR.
|
|
Logical Exclusive OR.
|
|
Logical Exclusive OR.
|
|
Range Restriction Calculation for Packed Pairs of Float64 Values.
|
|
Range Restriction Calculation for Packed Pairs of Float32 Values.
|
|
Range Restriction Calculation From a Pair of Scalar Float64 Values.
|
|
Range Restriction Calculation From a Pair of Scalar Float32 Values.
|
|
Compute Approximate Reciprocals of Packed Float64 Values.
|
|
Compute Approximate Reciprocals of Packed Float32 Values.
|
|
Compute Approximate Reciprocal of Scalar Float64 Value.
|
|
Compute Approximate Reciprocal of Scalar Float32 Value.
|
|
Approximation to the Reciprocal of Packed Double Precision Floating-Point Values With Less Than 2^-28 Relative Error.
|
|
Approximation to the Reciprocal of Packed Single Precision Floating-Point Values With Less Than 2^-28 Relative Error.
|
|
Approximation to the Reciprocal of Scalar Double Precision Floating-Point Value With Less Than 2^-28 Relative Error.
|
|
Approximation to the Reciprocal of Scalar Single Precision Floating-Point Value With Less Than 2^-28 Relative Error.
|
|
Compute Reciprocals of Packed FP16 Values.
|
|
Compute Reciprocals of Packed Single Precision Floating-Point Values.
|
|
Compute Reciprocal of Scalar FP16 Value.
|
|
Compute Reciprocal of Scalar Single Precision Floating-Point Values.
|
|
Perform Reduction Transformation on Packed Float64 Values.
|
|
Perform Reduction Transformation on Packed FP16 Values.
|
|
Perform Reduction Transformation on Packed Float32 Values.
|
|
Perform a Reduction Transformation on a Scalar Float64 Value.
|
|
Perform Reduction Transformation on Scalar FP16 Value.
|
|
Perform a Reduction Transformation on a Scalar Float32 Value.
|
|
|
Round Packed Float64 Values to Include a Given Number of Fraction Bits.
|
|
Round Packed FP16 Values to Include a Given Number of Fraction Bits.
|
|
Round Packed Float32 Values to Include a Given Number of Fraction Bits.
|
|
Round Scalar Float64 Value to Include a Given Number of Fraction Bits.
|
|
Round Scalar FP16 Value to Include a Given Number of Fraction Bits.
|
|
Round Scalar Float32 Value to Include a Given Number of Fraction Bits.
|
Round Packed Double Precision Floating-Point Values.
|
|
Round Packed Single Precision Floating-Point Values.
|
|
Round Scalar Double Precision Floating-Point Values.
|
|
Round Scalar Single Precision Floating-Point Values.
|
|
|
Compute Approximate Reciprocals of Square Roots of Packed Float64 Values.
|
|
Compute Approximate Reciprocals of Square Roots of Packed Float32 Values.
|
|
Compute Approximate Reciprocal of Square Root of Scalar Float64 Value.
|
|
Compute Approximate Reciprocal of Square Root of Scalar Float32 Value.
|
|
Approximation to the Reciprocal Square Root of Packed Double Precision Floating-Point Values With Less Than 2^-28 Relative Error.
|
|
Approximation to the Reciprocal Square Root of Packed Single Precision Floating-Point Values With Less Than 2^-28 Relative Error.
|
|
Approximation to the Reciprocal Square Root of Scalar Double Precision Floating-Point Value With Less Than 2^-28 Relative Error.
|
|
Approximation to the Reciprocal Square Root of Scalar Single Precision Floating-Point Value With Less Than 2^-28 Relative Error.
|
Compute Reciprocals of Square Roots of Packed FP16 Values.
|
|
Compute Reciprocals of Square Roots of Packed Single Precision Floating-Point Values.
|
|
Compute Approximate Reciprocal of Square Root of Scalar FP16 Value.
|
|
Compute Reciprocal of Square Root of Scalar Single Precision Floating-Point Value.
|
|
Scale Packed Float64 Values With Float64 Values.
|
|
Scale Packed FP16 Values with FP16 Values.
|
|
Scale Packed Float32 Values With Float32 Values.
|
|
Scale Scalar Float64 Values With Float64 Values.
|
|
Scale Scalar FP16 Values with FP16 Values.
|
|
Scale Scalar Float32 Value With Float32 Value.
|
|
|
Scatter Packed Single Precision, Packed Double Precision Floating-Point Values with Signed Dword and Qword Indices.
|
|
Scatter Packed Single Precision, Packed Double Precision Floating-Point Values with Signed Dword and Qword Indices.
|
|
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint With Intent to Write.
|
|
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint With Intent to Write.
|
|
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint With Intent to Write.
|
|
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint With Intent to Write.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint With Intent to Write.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint With Intent to Write.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint With Intent to Write.
|
|
Sparse Prefetch Packed SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint With Intent to Write.
|
|
Scatter Packed Single Precision, Packed Double Precision Floating-Point Values with Signed Dword and Qword Indices.
|
|
Scatter Packed Single Precision, Packed Double Precision Floating-Point Values with Signed Dword and Qword Indices.
|
|
Perform an Intermediate Calculation for the Next Four SHA512 Message Qwords.
|
|
Perform a Final Calculation for the Next Four SHA512 Message Qwords.
|
|
Perform Two Rounds of SHA512 Operation.
|
|
Shuffle Packed Values at 128-Bit Granularity.
|
|
Shuffle Packed Values at 128-Bit Granularity.
|
|
Shuffle Packed Values at 128-Bit Granularity.
|
|
Shuffle Packed Values at 128-Bit Granularity.
|
Packed Interleave Shuffle of Pairs of Double Precision Floating-Point Values.
|
|
Packed Interleave Shuffle of Quadruplets of Single Precision Floating-Point Values.
|
|
Perform Initial Calculation for the Next Four SM3 Message Words.
|
|
Perform Final Calculation for the Next Four SM3 Message Words.
|
|
Perform Two Rounds of SM3 Operation.
|
|
Perform Four Rounds of SM4 Key Expansion.
|
|
Performs Four Rounds of SM4 Encryption.
|
|
Square Root of Double Precision Floating-Point Values.
|
|
Compute Square Root of Packed FP16 Values.
|
|
Square Root of Single Precision Floating-Point Values.
|
|
Compute Square Root of Scalar Double Precision Floating-Point Value.
|
|
Compute Square Root of Scalar FP16 Value.
|
|
Compute Square Root of Scalar Single Precision Value.
|
|
Store MXCSR Register State.
|
|
Subtract Packed Double Precision Floating-Point Values.
|
|
Subtract Packed FP16 Values.
|
|
Subtract Packed Single Precision Floating-Point Values.
|
|
Subtract Scalar Double Precision Floating-Point Value.
|
|
Subtract Scalar FP16 Value.
|
|
Subtract Scalar Single Precision Floating-Point Value.
|
|
Packed Bit Test.
|
|
Packed Bit Test.
|
|
Unordered Compare Scalar Double Precision Floating-Point Values and Set EFLAGS.
|
|
Unordered Compare Scalar FP16 Values and Set EFLAGS.
|
|
Unordered Compare Scalar Single Precision Floating-Point Values and Set EFLAGS.
|
|
Unpack and Interleave High Packed Double Precision Floating-Point Values.
|
|
Unpack and Interleave High Packed Single Precision Floating-Point Values.
|
|
Unpack and Interleave Low Packed Double Precision Floating-Point Values.
|
|
Unpack and Interleave Low Packed Single Precision Floating-Point Values.
|
|
Bitwise Logical XOR of Packed Double Precision Floating-Point Values.
|
|
Bitwise Logical XOR of Packed Single Precision Floating-Point Values.
|
|
Zero XMM, YMM, and ZMM Registers.
|
|
|
Zero Upper Bits of YMM and ZMM Registers.
|
Wait.
|
|
Write Back and Invalidate Cache.
|
|
Write Back and Do Not Invalidate Cache.
|
|
Write FS/GS Segment Base.
|
|
Write FS/GS Segment Base.
|
|
Write to Model Specific Register.
|
|
Write List of Model Specific Registers.
|
|
Non-Serializing Write to Model Specific Register.
|
|
Write Data to User Page Key Register.
|
|
Write to Shadow Stack.
|
|
Write to Shadow Stack.
|
|
Write to User Shadow Stack.
|
|
Write to User Shadow Stack.
|
|
Transactional Abort.
|
|
Hardware Lock Elision Prefix Hints.
|
|
Exchange and Add.
|
|
Transactional Begin.
|
|
Exchange Register/Memory With Register.
|
|
Cipher Block Chaining.
|
|
Cipher Feedback Mode.
|
|
Counter Mode (ACE2).
|
|
Electronic code book.
|
|
Output Feedback Mode.
|
|
Transactional End.
|
|
Get Value of Extended Control Register.
|
|
Table Look-up Translation.
|
|
Table Look-up Translation.
|
|
Modular Multiplication.
|
|
Logical Exclusive OR.
|
|
Bitwise Logical XOR of Packed Double Precision Floating-Point Values.
|
|
Bitwise Logical XOR of Packed Single Precision Floating-Point Values.
|
|
Hardware Lock Elision Prefix Hints.
|
|
Resume Tracking Load Addresses.
|
|
Random Number Generation.
|
|
Restore Processor Extended States.
|
|
Restore Processor Extended States.
|
|
Restore Processor Extended States Supervisor.
|
|
Restore Processor Extended States Supervisor.
|
|
Save Processor Extended States.
|
|
Save Processor Extended States.
|
|
Save Processor Extended States With Compaction.
|
|
Save Processor Extended States With Compaction.
|
|
Save Processor Extended States Optimized.
|
|
|
Save Processor Extended States Optimized.
|
Save Processor Extended States Supervisor.
|
|
Save Processor Extended States Supervisor.
|
|
Set Extended Control Register.
|
|
Hash Function SHA-1.
|
|
Hash Function SHA-256.
|
|
Hash Function SHA-384.
|
|
Hash Function SHA-512.
|
|
Store Available Random Bytes.
|
|
Suspend Tracking Load Addresses.
|
|
Test if in Transactional Execution.
|