Opcode Type
Represents a MIPS opcode.
Record fields
| Record Field |
Description
|
Floating Point Absolute Value.
|
|
Add Word.
|
|
Add Immediate Word.
|
|
Add Immediate Unsigned Word.
|
|
Add Immediate to PC.
|
|
Add Unsigned Word.
|
|
Concatenate two GPRs, and extract a contiguous subset at a byte position.
|
|
Float Point Align Variable.
|
|
Aligned Add Upper Immediate to PC.
|
|
And.
|
|
And immediate.
|
|
Add Immediate to Upper Bits.
|
|
Add Upper Immediate to PC.
|
|
Unconditional Branch.
|
|
Branch and Link.
|
|
Branch and Link, Compact.
|
|
Branch, Compact.
|
|
Branch if Coprocessor 1 (FPU) Register Bit 0 Equal to Zero.
|
|
Branch on FP False.
|
|
Branch on FP False Likely.
|
|
Branch if Coprocessor 1 (FPU) Register Bit 0 Not Equal to Zero.
|
|
Branch on FP True.
|
|
Branch on FP True Likely.
|
|
Branch if Coprocessor 2 Condition Register Equal to Zero.
|
|
Branch on COP2 False.
|
|
Branch on COP2 False Likely.
|
|
Branch if Coprocessor 2 Condition Register Not Equal to Zero.
|
|
Branch on COP2 True.
|
|
Branch on COP2 True Likely.
|
|
Branch on COP3 False.
|
|
Branch on COP3 False Likely.
|
|
Branch on COP3 True.
|
|
Branch on COP3 True Likely.
|
|
Branch on Equal.
|
|
Compact Compare-and-Branch if equal to.
|
|
Branch on Equal Likely.
|
|
Compact Zero-Compare and Branch-and-Link if equal to zero.
|
|
Compact Compare-and-Branch if equal to zero.
|
|
Compact Compare-and-Branch if greater than or equal to.
|
|
Compact Compare-and-Branch if unsigned greater or equal to.
|
|
Branch on Greater Than or Equal to Zero.
|
|
Branch on Greater Than or Equal to Zero and Link.
|
|
Compact Zero-Compare and Branch-and-Link if greater than or equal to zero.
|
|
Branch on Greater Than or Equal to Zero and Link Likely.
|
|
Compact Compare-and-Branch if greater than or equal to zero.
|
|
Branch on Greater than or Equal to Zero Likely.
|
|
Branch on Greater Than Zero.
|
|
Compact Zero-Compare and Branch-and-Link if greater than zero.
|
|
Compact Compare-and-Branch if greater than zero.
|
|
Branch on Greater Than Zero Likely.
|
|
Swaps (reverses) bits in each byte.
|
|
Branch on Less Than or Equal to Zero.
|
|
Compact Zero-Compare and Branch-and-Link if less than or equal to zero.
|
|
Compact Compare-and-Branch if less than or equal to zero.
|
|
Branch on Less Than or Equal to Zero Likely.
|
|
Compact Compare-and-Branch if less than.
|
|
Compact Compare-and-Branch if unsigned less than.
|
|
Branch on Less Than Zero.
|
|
Branch on Less Than Zero and Link.
|
|
Compact Zero-Compare and Branch-and-Link if less than zero.
|
|
Branch on Less Than Zero and Link Likely.
|
|
Compact Compare-and-Branch if less than zero.
|
|
Branch on Less Than Zero Likely.
|
|
Branch on Not Equal.
|
|
Compact Compare-and-Branch if not equal to.
|
|
Branch on Not Equal Likely.
|
|
Compact Zero-Compare and Branch-and-Link if not equal to zero.
|
|
Compact Compare-and-Branch if not equal to zero.
|
|
Branch on No Overflow, Compact.
|
|
Branch on Overflow, Compact.
|
|
Breakpoint.
|
|
Floating Point Compare.
|
|
Perform Cache Operation.
|
|
Perform Cache Operation EVA.
|
|
Fixed Point Ceiling Convert to Long Fixed Point.
|
|
Fixed Point Ceiling Convert to Word Fixed Point.
|
|
Move Control Word From Floating Point.
|
|
Move Control Word From Coprocessor 2.
|
|
Scalar Floating-Point Class Mask.
|
|
Count Leading Ones in Word.
|
|
Count Leading Zeros in Word.
|
|
Floating Point Compare Setting Mask.
|
|
Coprocessor Operation to Coprocessor 2.
|
|
Generate CRC with reversed polynomial 0xEDB88320.
|
|
Generate CRC with reversed polynomial 0x82F63B78.
|
|
Generate CRC with reversed polynomial 0x82F63B78.
|
|
Generate CRC with reversed polynomial 0x82F63B78.
|
|
Generate CRC with reversed polynomial 0xEDB88320.
|
|
Generate CRC with reversed polynomial 0xEDB88320.
|
|
Move Control Word to Floating Point.
|
|
Move Control Word to Coprocessor 2.
|
|
Floating Point Convert to Double Floating Point.
|
|
Floating Point Convert to Long Fixed Point.
|
|
Floating Point Convert Pair to Paired Single.
|
|
Floating Point Convert to Single Floating Point.
|
|
Floating Point Convert Pair Lower to Single Floating Point.
|
|
Floating Point Convert Pair Upper to Single Floating Point.
|
|
Floating Point Convert to Word Fixed Point.
|
|
Add Dword.
|
|
Doubleword Add Immediate Unsigned.
|
|
Doubleword Add Unsigned.
|
|
Concatenate two GPRs, and extract a contiguous subset at a byte position.
|
|
Swaps (reverses) bits in each byte.
|
|
Count Leading Zeros in Doubleword.
|
|
Doubleword Divide.
|
|
Doubleword Divide Unsigned.
|
|
Debug Exception Return.
|
|
Doubleword Extract Bit Field.
|
|
Doubleword Extract Bit Field Middle.
|
|
Doubleword Extract Bit Field Upper.
|
|
Disable Interrupts.
|
|
Doubleword Insert Bit Field.
|
|
Doubleword Insert Bit Field Middle.
|
|
Doubleword Insert Bit Field Upper.
|
|
Divide Word.
|
|
Divide Words Unsigned.
|
|
Doubleword Move from Floating Point.
|
|
Doubleword Move to Floating Point.
|
|
Doubleword Multiply.
|
|
Doubleword Multiply Unsigned.
|
|
Doubleword Rotate Right.
|
|
Doubleword Rotate Right Plus 32.
|
|
Doubleword Rotate Right Variable.
|
|
Doubleword Swap Bytes Within Halfwords.
|
|
Doubleword Swap Halfwords Within Doublewords.
|
|
Doubleword Shift Left Logical.
|
|
Doubleword Shift Left Logical Plus 32.
|
|
Doubleword Shift Left Logical Variable.
|
|
Doubleword Shift Right Arithmetic.
|
|
Doubleword Shift Right Arithmetic Plus 32.
|
|
Doubleword Shift Right Arithmetic Variable.
|
|
Doubleword Shift Right Logical.
|
|
Doubleword Shift Right Logical Plus 32.
|
|
Doubleword Shift Right Logical Variable.
|
|
Doubleword Subtract Unsigned.
|
|
Disable Virtual Processor.
|
|
Execution Hazard Barrier.
|
|
Enable Interrupts.
|
|
Exception Return.
|
|
Exception Return No Clear.
|
|
Enable Virtual Processor.
|
|
Extract Bit Field.
|
|
Floating Point Floor Convert to Long Fixed Point.
|
|
Floating Point Floor Convert to Word Fixed Point.
|
|
Global Invalidate Instruction Cache.
|
|
Global Invalidate TLB.
|
|
Insert Bit Field.
|
|
Invalid Opcode.
|
|
Jump.
|
|
Jump and Link.
|
|
Jump and Link Register.
|
|
Jump and Link Register with Hazard Barrier.
|
|
Jump and Link Exchange.
|
|
Jump Indexed and Link, Compact.
|
|
Jump Indexed, Compact.
|
|
Jump Register.
|
|
Jump Register with Hazard Barrier.
|
|
Load Byte.
|
|
Load Byte EVA.
|
|
Load Byte Unsigned.
|
|
Load Byte Unsigned EVA.
|
|
Load Doubleword.
|
|
Load Doubleword to Floating Point.
|
|
Load Doubleword to Coprocessor 2.
|
|
Load Doubleword Left.
|
|
Load Doubleword Right.
|
|
Load Doubleword Indexed to Floating Point.
|
|
Load Halfword.
|
|
Load Halfword EVA.
|
|
Load Halfword Unsigned.
|
|
Load Halfword Unsigned EVA.
|
|
Load Linked Word.
|
|
Load Linked Doubleword.
|
|
Load Linked Word EVA.
|
|
Load Linked Word Paired.
|
|
Load Linked Word Paired EVA.
|
|
Load Scaled Address.
|
|
Load Upper Immediate.
|
|
Load Doubleword Indexed Unaligned to Floating Point.
|
|
Load Word.
|
|
Load Word to Floating Point.
|
|
Load Word to Coprocessor 2.
|
|
Load Word EVA.
|
|
Load Word Left.
|
|
Load Word Left EVA.
|
|
Load Word PC-relative.
|
|
Load Word Right.
|
|
Load Word Right EVA.
|
|
Load Word Unsigned.
|
|
Load Word Indexed to Floating Point.
|
|
Multiply and Add Word to Hi, Lo.
|
|
Floating Point Fused Multiply Add.
|
|
Multiply and Add Unsigned Word to Hi,Lo.
|
|
Scalar Floating-Point Max.
|
|
Scalar Floating-Point argument with Max Absolute Value.
|
|
Move from Coprocessor 0.
|
|
Move Word From Floating Point.
|
|
Move Word From Coprocessor 2.
|
|
Move from High Coprocessor 0.
|
|
Move Word From High Half of Floating Point Register.
|
|
Move Word From High Half of Coprocessor 2 Register.
|
|
Move From HI Register.
|
|
Move From LO Register
|
|
Scalar Floating-Point Min.
|
|
Scalar Floating-Point argument with Min Absolute Value.
|
|
Modulo Words.
|
|
Modulo Words Unsigned.
|
|
Floating Point Move.
|
|
Move Conditional on Floating Point False.
|
|
Move Conditional on Not Zero.
|
|
Move Conditional on Floating Point True.
|
|
Move Conditional on Zero.
|
|
Floating Point Multiply Subtract.
|
|
Floating Point Fused Multiply Sub.
|
|
Multiply and Subtract Word to Hi,Lo.
|
|
Move to Coprocessor 0.
|
|
IMove Word to Floating Point.
|
|
Move Word to Coprocessor 2.
|
|
Move to High Coprocessor 0.
|
|
Move Word to High Half of Floating Point Register.
|
|
Move Word to High Half of Coprocessor 2 Register.
|
|
Move to HI Register.
|
|
Move to LO Register
|
|
Multiply Words Signed, High Word.
|
|
Multiply Words Unsigned, High Word
|
|
Multiply Word to GPR.
|
|
Multiply Word.
|
|
Multiply Unsigned Word.
|
|
Multiply Words Unsigned, Low Word
|
|
No-op and Link.
|
|
Floating Point Negate.
|
|
Floating Point Negative Multiply Add.
|
|
Floating Point Negative Multiply Subtract.
|
|
No Operation.
|
|
Not Or.
|
|
Or.
|
|
Or Immediate.
|
|
Wait for the LLBit to clear.
|
|
Pair Lower Lower.
|
|
Pair Lower Upper.
|
|
Prefetch.
|
|
Prefetch EVA.
|
|
Prefetch Indexed.
|
|
Pair Upper Lower.
|
|
Pair Upper Upper.
|
|
Read Hardware Register.
|
|
Read GPR from Previous Shadow Set.
|
|
Reciprocal Approximation.
|
|
Floating-Point Round to Integral.
|
|
Rotate Word Right.
|
|
Rotate Word Right Variable.
|
|
Floating Point Round to Long Fixed Point.
|
|
Floating Point Round to Word Fixed Point.
|
|
Reciprocal Square Root Approximation.
|
|
Store Byte.
|
|
Store Byte EVA.
|
|
Store Conditional Word.
|
|
Store Conditional Doubleword.
|
|
Store Conditional Word EVA.
|
|
Store Conditional Word Paired.
|
|
Store Conditional Word Paired EVA.
|
|
Store Doubleword.
|
|
Software Debug Breakpoint.
|
|
Store Doubleword from Floating Point.
|
|
Store Doubleword from Coprocessor 2.
|
|
Store Doubleword Left.
|
|
Store Doubleword Right.
|
|
Store Doubleword Indexed from Floating Point.
|
|
Sign-Extend Byte.
|
|
Sign-Extend Halfword.
|
|
Select floating point values with FPR condition.
|
|
Select integer GPR value or zero.
|
|
Select floating point value or zero with FPR condition.
|
|
Select integer GPR value or zero.
|
|
Store Halfword.
|
|
Store Halfword EVA.
|
|
Signal Reserved Instruction Exception.
|
|
Shift Word Left Logical.
|
|
Shift Word Left Logical Variable.
|
|
Set on Less Than.
|
|
Set on Less Than Immediate.
|
|
Set on Less Than Immediate Unsigned.
|
|
Set on Less Than Unsigned.
|
|
Floating Point Square Root.
|
|
Shift Word Right Arithmetic.
|
|
Shift Word Right Arithmetic Variable.
|
|
Shift Word Right Logical.
|
|
Shift Word Right Logical Variable.
|
|
Superscalar No Operation.
|
|
Subtract Word.
|
|
Subtract Unsigned Word.
|
|
Store Doubleword Indexed Unaligned from Floating Point.
|
|
Store Word.
|
|
Store Word from Floating Point.
|
|
Store Word from Coprocessor 2.
|
|
Store Word EVA.
|
|
Store Word Left.
|
|
Store Word Left EVA.
|
|
Store Word Right.
|
|
Store Word Right EVA.
|
|
Store Word Indexed from Floating Point.
|
|
Synchronize Shared Memory.
|
|
Synchronize Caches to Make Instruction Writes Effective
|
|
System Call.
|
|
Trap if Equal.
|
|
Trap if Equal Immediate.
|
|
Trap if Greater or Equal.
|
|
Trap if Greater or Equal Immediate.
|
|
Trap if Greater or Equal Immediate Unsigned.
|
|
Trap if Greater or Equal Unsigned.
|
|
TLB Invalidate.
|
|
TLB Invalidate Flush.
|
|
Probe TLB for Matching Entry.
|
|
Read Indexed TLB Entry.
|
|
Read Indexed TLB Entry.
|
|
Write Random TLB Entry.
|
|
Trap if Less Than.
|
|
Trap if Less Than Immediate.
|
|
Trap if Less Than Immediate Unsigned.
|
|
Trap if Less Than Unsigned.
|
|
Trap if Not Equal.
|
|
Trap if Not Equal Immediate.
|
|
Floating Point Truncate to Long Fixed Point.
|
|
Floating Point Truncate to Word Fixed Point.
|
|
Enter Standby Mode.
|
|
Write to GPR in Previous Shadow Set.
|
|
Word Swap Bytes Within Halfwords.
|
|
Exclusive OR.
|
|
Exclusive OR Immediate.
|
B2R2