Opcode Type
Represents a PARISC opcode.
Record fields
| Record Field |
Description
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To do 64-bit integer addition and conditionally
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To add two values and perform an IA-relative branch conditionally
|
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To add an immediate value to a register and conditionally
|
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To add two values and perform an IA-relative branch conditionally
|
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To add the upper portion of 32-bit immediate value to a general register.
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To do a 64-bit, bitwise AND.
|
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To do a 64-bit bitwise AND with complement.
|
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To do IA-relative branches with optional privilege level change
|
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To perform an IA-relative branch conditionally
|
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To do procedure calls, branches and returns to another space.
|
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To do IA-relative branches with a dynamic displacement
|
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To cause a break instruction trap for debugging purposes.
|
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To do base-relative branches with a dynamic displacement
|
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To do base-relative branches and procedure calls to another space.
|
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To load a doubleword into a coprocessor register.
|
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To load a word into a coprocessor register.
|
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To clear the branch target stack.
|
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To compare two values and perform an IA-relative branch conditionally
|
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To compare two registers, set a register to 0, and conditionally
|
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To compare two values and perform an IA-relative branch conditionally
|
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To compare an immediate value with the contents of a register
|
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To invoke a coprocessor unit operation.
|
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To store a doubleword from a coprocessor register.
|
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To store a word from a coprocessor register.
|
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To separately correct the 16 BCD digits of the result
|
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To deposit a value into a register at a fixed or variable position
|
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To deposit an immediate value into a register
|
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To deposit a value into the rightmost 32 bits of a register
|
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To deposit an immediate value into the rightmost 32 bits of a register
|
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To provide implementation-dependent operations for system initialization
|
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To provide the primitive operation for integer division.
|
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To extract any 64-bit or shorter field from a fixed or variable position
|
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To extract any 32-bit or shorter field from a fixed or variable position
|
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To perform a floating-point absolute value.
|
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To perform a floating-point addition.
|
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To perform a floating-point comparison.
|
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To change the value in a floating-point register
|
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To copy a floating-point value to another floating-point register.
|
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To invalidate a data cache line and write it back to memory if it dirty.
|
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To provide for flushing the entire data or combined cache
|
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To perform a floating-point division.
|
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To invalidate an instruction cache line.
|
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To provide for flushing the entire instruction or combined cache
|
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To validate fields in the Status Register
|
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To load a doubleword into a floating-point coprocessor register.
|
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To load a word into a floating-point coprocessor register.
|
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To perform a floating-point multiply.
|
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To perform a floating-point multiply and a floating-point add.
|
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To perform a floating-point multiply and fused add.
|
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To perform a floating-point multiply, negate, and fused add.
|
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To perform a floating-point multiply and a floating-point subtract.
|
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To negate a floating-point value.
|
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To negate a floating-point absolute value.
|
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To round a floating-point value to an integral value.
|
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To perform a floating-point square root.
|
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To store a doubleword from a floating-point coprocessor register.
|
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To store a word from a floating-point coprocessor register.
|
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To perform a floating-point subtraction.
|
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To test the results of one or more earlier comparisons.
|
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To add multiple halfwords in parallel with optional saturation.
|
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To average multiple halfwords in parallel.
|
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To perform multiple parallel halfword shift left operations.
|
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To perform multiple halfword shift left and add
|
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To perform multiple parallel halfword
|
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To perform multiple halfword shift right and add
|
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To subtract multiple halfwords in parallel with optional saturation.
|
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To add an entry to the data TLB.
|
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To add an entry to the instruction TLB.
|
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To determine the coherence index corresponding to a virtual address.
|
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To load a byte into a general register.
|
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To read and lock a doubleword semaphore in main memory.
|
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To read and lock a word semaphore in main memory.
|
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To load a doubleword into a general register.
|
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To load a doubleword into a general register from an absolute address.
|
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To load a halfword into a general register.
|
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To load the upper portion of a 32-bit immediate value
|
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To load an offset into a general register.
|
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To calculate the space register number referenced by an implicit pointer
|
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To load a word into a general register.
|
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To load a word into a general register from an absolute address.
|
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To determine the absolute address of a mapped virtual page.
|
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To move a value to a general register from a control register.
|
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To move the current instruction address to a general register.
|
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To move a value to a general register from a space register.
|
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To combine four halfwords from two source registers
|
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To combine two words from two source registers
|
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To copy one register to another and perform an IA-relative branch
|
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To copy an immediate value into a register
|
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To move a value from a general register to a control register.
|
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To take the one’s complement of a value from a general register.
|
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To set PSW system mask bits to a value from a register.
|
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To move a value from a general register to a space register.
|
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To do a 64-bit, bitwise inclusive OR.
|
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To invalidate a data cache line.
|
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To invalidate a data TLB entry.
|
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To invalidate a data TLB entry without matching the address portion.
|
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To select any combination of four halfwords from a source register
|
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To invalidate an instruction TLB entry.
|
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To invalidate an instruction TLB entry without matching
|
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To disable the implementation-dependent performance monitor coprocessor
|
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To enable the implementation-dependent performance monitor coprocessor.
|
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To determine whether read or write access to a given address is allowed.
|
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To determine whether read or write access to a given address is allowed.
|
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To push a value from a GR onto the branch target stack.
|
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To push the currently nominated address onto the branch target stack.
|
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To restore processor state
|
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To selectively reset bits in the system mask to 0.
|
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To provide a primitive operation for multiplication.
|
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To shift a pair of registers by fixed or variable amount and conditionally
|
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To shift the rightmost 32 bits of a pair of registers
|
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To invoke a special function unit operation.
|
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To copy a special function unit register or result to a general register.
|
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To perform a parameterized special function unit operation.
|
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To perform a parameterized special function unit operation.
|
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To selectively set bits in the system mask to 1.
|
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To store a byte from a general register.
|
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To implement the beginning, middle, and ending cases
|
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To store a doubleword from a general register.
|
|
To store a doubleword from a general register to an absolute address.
|
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To implement the beginning, middle, and ending cases
|
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To store a halfword from a general register.
|
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To store a word from a general register.
|
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To store a word from a general register to an absolute address.
|
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To do 64-bit integer subtraction, and conditionally
|
|
To subtract a register from an immediate value and conditionally
|
|
To enforce program order of instruction execution.
|
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To enforce DMA completion order.
|
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To individually compare corresponding sub-units of a doubleword
|
|
To individually compare corresponding sub-units
|
|
To perform unsigned fixed-point multiplication.
|
|
To do a 64-bit, bitwise exclusive OR.
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B2R2